Hardware Counter Time Synchronization for Clock Precision
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Solution Overview
Problem
Existing time synchronization methods, such as Precision Time Protocol (PTP), face challenges in accurately calculating the difference between the times of multiple clocks due to arbitration and access competition in system buses, leading to fluctuations in acquired times.
Innovation Solution
A communication apparatus is designed with multiple clocks, counter units, an instruction unit, an acquisition unit, and a calculation unit to synchronize and calculate the difference between the count values of these clocks, using a method that involves acquiring count values at specific intervals and calculating the average transmission path delay to correct for time differences.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the times of PHCs are acquired multiple times to reduce fluctuation, then the measurement precision improves, but the device complexity and processing time increase
Solution Approach 1:
The patent replaces the software-based time acquisition method with a hardware counter that directly records PHC times. This hardware counter is synchronized with both PHCs and provides simultaneous count values without software arbitration or access competition, eliminating the need for multiple software acquisitions and reducing system complexity while maintaining precision
Solution Approach 2:
The patent introduces a hardware counter as an intermediary between the PHCs and the software. This counter unit receives synchronization signals from PHCs and provides unified time information to software, avoiding direct software access to PHCs and the associated arbitration overhead
2Ease of operation
If software acquires PHC times through system bus access, then the ease of operation improves, but measurement precision deteriorates due to arbitration and access competition
Solution Approach 1:
The patent introduces a hardware counter as an intermediary that bridges PHCs and software. The counter is synchronized with PHCs and provides unified time information through a dedicated interface, eliminating system bus arbitration and access competition while maintaining software ease of operation
Solution Approach 2:
The patent segments the time synchronization function into separate hardware components (counter units synchronized with each PHC) and a unified hardware counter that records times from multiple PHCs simultaneously. This segmentation allows independent PHC operation while providing synchronized access through the hardware counter
Data Source
AI summary
A communication apparatus includes a plurality of clocks configured to output signals indicating current times, a plurality of counter units configured to synchronize with the plurality of clocks using the signals indicating the current times output from the plurality of clocks, an instruction unit configured to give an instruction to acquire count values of the plurality of counter units, an acquisition unit configured to acquire the count values of the plurality of counter units based on the instruction from the instruction unit, and a calculation unit configured to calculate a difference between the acquired count values.