Hardware Credit Request Processing for File System IOPS
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current data storage systems face challenges in efficiently processing large volumes of access requests and credit requests, leading to suboptimal IOPS performance due to the high workload and processing burden on CPUs, which hinders the ability to manage access requests effectively.
Innovation Solution
Implementing a hardware-side processing device with programmable hardware-implemented chips to handle request packets and generate responses, including credit responses, autonomously without involving the software-side CPU, thereby reducing the processing burden and enhancing IOPS performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If credit requests are processed by software-side CPUs, then processing flexibility is maintained, but processing speed and IOPS performance deteriorate due to high workload
Solution Approach 1:
The patent segments the processing architecture into hardware-side and software-side components. The hardware-side processing device handles credit requests and simple access requests, while the software-side processing device handles complex file system operations. This segmentation allows credit processing to be offloaded from CPUs to dedicated hardware, improving IOPS performance while maintaining system flexibility.
Solution Approach 2:
The patent introduces a hardware-side processing device as an intermediary between the network interface and the software-side processing device. This intermediary handles credit request processing and generates credit responses autonomously, reducing the processing burden on CPUs and improving overall system throughput.
2Speed
If hardware-side processing is implemented for credit requests, then processing speed increases, but system complexity increases
Solution Approach 1:
The processing architecture is divided into distinct hardware and software components. The hardware-side processing device is responsible for high-speed credit request processing, while the software-side processing device handles more complex operations. This clear segmentation allows each component to be optimized for its specific function, improving speed without creating unnecessary overall system complexity.
Solution Approach 2:
The hardware-side processing device is designed to autonomously process credit requests and generate credit responses without requiring software intervention. This self-service capability reduces the processing burden on the software-side and eliminates the need for complex software-hardware coordination for routine credit operations.
3Productivity
If software-side CPUs handle all access requests, then processing flexibility is maintained, but processing capacity is insufficient for high IOPS requirements
Solution Approach 1:
The patent segments the processing workload between hardware and software components. The hardware-side processing device handles high-volume, low-complexity operations such as credit requests and simple access requests, providing the processing capacity needed for high IOPS. The software-side processing device maintains flexibility for handling complex file system operations, thus resolving the contradiction between capacity and flexibility.
Solution Approach 2:
The hardware-side processing device is designed with multi-functionality to handle both credit requests and simple access requests. This universal capability allows a single hardware component to provide the additional processing capacity needed for high IOPS requirements while maintaining ease of operation through unified hardware-based processing for these request types.
Data Source
AI summary
The apparatus includes: a hardware-side processing section including one or more programmable hardware-implemented chips configured to process request packets, which are received from host computers and relate to access requests to one or more file systems managed by the apparatus, and to generate response packets for the processed request packets; and a software-side processing section including one or more CPUs configured to execute decoding of requests packets sent from a host computer based on one or more computer programs stored in a memory of the software-side; wherein at least one programmable hardware-implemented chip of the hardware-side processing section is configured to process a credit request included in a received request packet, in particular without involvement of the software-side processing section.


