Hardware-Based Data Layout Optimization for CNN Convolution Efficiency

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Solution Overview

Problem

Existing methods for deploying trained CNN models on computation platforms do not effectively improve the execution efficiency of convolution computation, which is a significant bottleneck in image-related applications.

Innovation Solution

A hardware environment-based data operation method that determines the optimal data layout for convolution computation by identifying the maximum number of channels for parallel computation on target hardware, converting data to this layout, and performing convolution operations using the target hardware, while also optimizing memory allocation and thread scheduling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a trained CNN model is directly deployed on an existing computation platform, then the deployment process is simple, but the execution efficiency of convolution computation is low

Engineering Contradiction:
Improveexecution efficiency of convolution computationVSAvoiddata layout conversion complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by determining the optimal data layout in advance based on the target hardware's parallel computation capabilities before executing convolution operations. The system pre-processes the data layout conversion according to the maximum number of channels the hardware can handle in parallel, so that when convolution computation begins, the data is already in the optimal format for efficient processing, thereby resolving the contradiction between execution efficiency and conversion complexity.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If data is processed without optimizing parallel computation channels, then the processing flow is simple, but the utilization of hardware resources is insufficient

Engineering Contradiction:
Improveparallel computation efficiencyVSAvoidhardware resource management complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies parameter changes by dynamically adjusting the data layout parameters according to the target hardware's specific parallel computation capabilities. The system determines the maximum number of channels the hardware can process in parallel and converts the input data layout to match this parameter, thereby optimizing parallel computation efficiency while managing hardware resource complexity through systematic parameter adaptation.

Inventive Principle:
Principle #35Parameter changes

3Loss of time

If convolution computation is performed without data layout optimization, then the computation process is straightforward, but the computation time is excessive

Engineering Contradiction:
Improveconvolution computation timeVSAvoiddata operation complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by performing data layout conversion before convolution computation to reduce computation time. The system determines the optimal layout based on hardware capabilities and pre-arranges data in this layout, so that the subsequent convolution operations can execute efficiently without time loss, balancing the trade-off between operation complexity and computation time.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20230409885A1Hardware Environment-Based Data Operation Method, Apparatus and Device, and Storage Medium
Publication Date: 2023.12.21 INSPUR SUZHOU INTELLIGENT TECH CO LTD
  • US20230409885A1 patent drawing
  • US20230409885A1 patent drawing
  • US20230409885A1 patent drawing

AI summary

A hardware environment-based data operation method, apparatus and device, and a storage medium. The method includes: determining data to be operated and target hardware, wherein the target hardware is a hardware resource that needs to perform convolution computation on the data to be operated currently; determining the maximum number of channels in which the target hardware executes parallel computation, and determining a data layout corresponding to the maximum number of channels to be an optimal data layout; and converting the data layout of the data to be operated into the optimal data layout, and performing the convolution computation on the data to be operated by using the target hardware after the conversion is completed. By means of the present disclosure, the maximum parallel program of a data operation is realized when the convolution computation of the data to be operated is implemented, so that the efficiency of the convolution computation is effectively increased; and as the convolution computation occupies nearly 90% of the computation time of a CNN, the present disclosure may effectively improve the execution efficiency of the CNN by improving the efficiency of the convolution computation.