Hardware Emulation Power Analysis Logic Analyzer
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Solution Overview
Problem
Current power analysis techniques for integrated circuits are inaccurate and fail to provide detailed enough information, leading to compromises in design that result in either over-designed products or unreliable operation due to peak power consumption issues.
Innovation Solution
The use of hardware logic emulation or simulation acceleration systems to collect and analyze state transition data for each logic gate and register, allowing for precise calculation and plotting of power consumption, enabling 'What If' analysis and optimization of power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If software simulation tools are used for power analysis, then power consumption can be calculated, but the analysis is inaccurate and cannot provide enough detail
Solution Approach 1:
The patent introduces an intermediary system consisting of a logic analyzer coupled to a processing system. The logic analyzer captures actual signal transitions from the circuit under test and provides this data to the processing system for power calculation. This intermediary approach bridges the gap between simple simulation and complex direct measurement, achieving accurate power analysis without requiring overly complex analysis systems.
Solution Approach 2:
The patent replaces software simulation methods with a hardware-based measurement approach. Instead of using software simulators that model circuit behavior, the system directly measures actual signal transitions using a logic analyzer and processes this real data to calculate power consumption. This substitution eliminates the inaccuracies inherent in simulation while avoiding the complexity of purely hardware-based analysis.
2Ease of operation
If average power consumption is used for analysis, then design process is simplified, but peak power consumption issues are missed leading to unreliable operation
Solution Approach 1:
The patent segments the power analysis into two distinct components: average power consumption and peak power consumption. The processing system calculates both metrics separately from the captured signal transition data. This segmentation allows designers to maintain the simplicity of average power analysis while also identifying peak power issues that could cause operational failures, thus improving reliability without sacrificing ease of operation.
Solution Approach 2:
The patent applies partial action by selectively analyzing different aspects of power consumption based on design needs. The system can focus on average power for battery-operated devices or on peak power for performance-critical applications. This partial analysis approach maintains simplicity where sufficient while providing detailed insights where necessary, balancing ease of operation with operational reliability.
3Reliability
If detailed power analysis is performed to identify peak consumption, then reliability improves, but analysis time and complexity increase
Solution Approach 1:
The patent performs preliminary action by capturing all signal transition data during circuit operation using the logic analyzer. This captured data is then processed to identify both average and peak power consumption characteristics. By performing this comprehensive data capture upfront, the system enables detailed power analysis without requiring extended analysis time, as all necessary information is already collected and ready for processing.
4Measurement precision
If hardware logic emulation is used for power analysis, then accurate detailed power consumption data is obtained, but device complexity and cost increase
Solution Approach 1:
The patent uses a logic analyzer as an intermediary device that couples the circuit under test to the processing system. This logic analyzer captures signal transitions and transmits the data for power calculation, achieving accurate power measurement without requiring full hardware logic emulation. The intermediary approach provides the necessary measurement precision while avoiding the complexity and cost of complete emulation systems.
Data Source
AI summary
The invention described here is the methods of using a hardware-based functional verification system to mimic a design under test (DUT), under intended application environment and software, to record or derive the transition activities of all circuits of the DUT, then calculate the total or partial power consumption during the period of interest. The period of interest is defined by the user in terms of “events” which are the arbitrary states of the DUT. Furthermore, the user can specify the number of sub-divisions required between events thus vary the apparent resolution of the power consumption profile.