Hardware Encryption Module for Forced Decryption Resistance

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Solution Overview

Problem

Existing hardware encryption methods are vulnerable to forced decryption through direct erasure or rewriting of encryption bits, lack flexibility in programming instructions, and have security risks due to super reading modes.

Innovation Solution

A hardware encryption module and method that includes a control unit and storage unit with a program area and data area, where the control unit determines encryption status based on an encryption bit address, allowing only program area encryption in encrypted mode, prohibiting writes to the encryption bit address, and discarding super reading modes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If hardware encryption is implemented to protect software intellectual property, then security is improved, but vulnerability to forced decryption through direct erasure or rewriting of encryption bits remains

Engineering Contradiction:

Improveencryption securityVSAvoidforced decryption vulnerability

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The storage unit is divided into a program area and a data area, with the encryption bit address specifically located in the program area. This segmentation isolates the encryption mechanism from general data storage, ensuring that encryption bits are protected by the same erasure constraints as program code, thereby preventing selective erasure or rewriting of encryption bits alone.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The control unit proactively prevents forced decryption by generating control timing sequences that prohibit writing operations to the encryption bit address when in encrypted mode. This preliminary protective measure blocks the harmful action of rewriting encryption bits before it can compromise security.

Inventive Principle:

Principle #9Preliminary anti-action

2Adaptability or versatility

If encryption bits can be freely written to enable decryption, then flexibility is improved, but security is worsened due to ability to force decryption

Engineering Contradiction:

Improvedecryption flexibilityVSAvoidencryption security

Core Design Contradiction:

Adaptability or versatilityVSReliability

Solution Approach 1:

The control unit dynamically adjusts access permissions to the encryption bit address based on the encryption status. When in encrypted mode, writing operations to the encryption bit address are prohibited to maintain security. When in decrypted mode, the system allows necessary write operations to enable decryption functionality, thus adapting access control to the current operational state.

Inventive Principle:

Principle #15Dynamics

3Ease of operation

If super reading mode is implemented to allow reading in both encrypted and decrypted modes, then ease of operation is improved, but security is worsened due to information leakage risks

Engineering Contradiction:

Improvereading accessibilityVSAvoidsecurity

Core Design Contradiction:

Ease of operationVSReliability

Solution Approach 1:

The patent removes the super reading mode capability from the system. Instead of allowing reads in both encrypted and decrypted modes simultaneously, the system extracts this ambiguous capability and replaces it with clear mode-specific reading behavior: in encrypted mode, only the program area is encrypted against reading, while in decrypted mode, full access is permitted. This elimination of super reading mode prevents information leakage while maintaining operational clarity.

Inventive Principle:

Principle #2Taking out (Extraction)

4Ease of manufacture

If encryption identifier is added at fixed position in storage area for software encryption, then implementation simplicity is improved, but storage resource usage increases and security decreases

Engineering Contradiction:

Improveimplementation simplicityVSAvoidsecurity

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

The patent replaces software-based encryption identifiers with a hardware encryption mechanism. Instead of using software flags or identifiers stored in memory, the encryption status is determined by the physical state of the storage unit (encrypted mode vs. decrypted mode), controlled by the control unit. This substitution eliminates the need for additional storage resources for encryption identifiers while significantly improving security through hardware-level protection.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS20260080108A1Hardware encryption module, chip and encryption method

Publication Date: 2026.03.19 CRM ICBG (WUXI) CO LTD

AI summary

A hardware encryption module, a chip and an encryption method. The hardware encryption module comprising a control unit and a storage unit; the control unit is connected to the storage unit, receives external instructions, determines an encryption status based on an encryption indicator in an encryption bit address of the storage unit, generates a first control timing sequence for controlling erase of the storage unit based on an external erase instruction, and generates a second control timing sequence for controlling reading/writing of the storage unit based on the encryption status and an external read/write instruction; when in an encrypted mode, only the program area is encrypted against reading, and writing operations to the encryption bit address are prohibited. All encryption behaviors of the present disclosure are effective only for the program area and are not effective for the data area.