Hardware State Feedback for Heterogeneous Core Scheduling
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Solution Overview
Problem
Conventional power management mechanisms fail to account for the heterogeneity of cores in heterogeneous processors, leading to inefficient energy consumption and stability issues due to assumptions of uniform core power/performance characteristics.
Innovation Solution
A hardware-guided scheduling (HGS) interface provides dynamic feedback of per-core power/performance characteristics to the operating system, enabling optimal resource allocation and operating point selection based on current hardware state and thermal constraints, independent of software inputs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If conventional power management mechanisms are used, then system simplicity is maintained, but energy efficiency deteriorates due to inability to account for core heterogeneity
Solution Approach 1:
The patent implements a feedback mechanism where the power controller dynamically provides per-core power and performance characteristics to the operating system scheduler. This feedback loop enables the scheduler to make informed scheduling decisions based on actual hardware state, improving energy efficiency by matching workloads to appropriate cores while maintaining manageable system complexity through structured information provision.
2Productivity
If homogeneous core assumptions are made, then scheduling simplicity is maintained, but system performance deteriorates due to suboptimal resource allocation
Solution Approach 1:
The patent applies local quality by providing per-core power and performance characteristics to the scheduler, enabling differentiated scheduling decisions for different cores. Instead of treating all cores uniformly, the system can now make locally optimized scheduling choices based on each core's actual capabilities, improving overall system performance while maintaining a relatively simple scheduling framework.
Solution Approach 2:
The system dynamically adapts scheduling decisions based on real-time hardware state information provided by the power controller. The scheduler receives updated per-core characteristics and adjusts its decisions accordingly, enabling dynamic resource allocation that optimizes performance without requiring complex static scheduling rules.
3Measurement precision
If dynamic hardware feedback is provided to the OS, then scheduling accuracy is improved, but information overhead increases
Solution Approach 1:
The patent extracts only the essential per-core power and performance characteristics needed for scheduling decisions, rather than providing complete hardware state information. By selectively providing only the necessary scheduling-related parameters, the system achieves accurate scheduling while minimizing information overhead and avoiding unnecessary data transmission.
Data Source
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AI summary
In one embodiment, a processor includes a power controller having a resource allocation circuit. The resource allocation circuit may: receive a power budget for a first core and at least one second core and scale the power budget based at least in part on at least one energy performance preference value to determine a scaled power budget; determine maximum operating points for the cores based at least in part on the scaled power budget; determine efficiency values for the cores based at least in part on the maximum operating points; and report a hardware state change to an operating system scheduler based on the efficiency values. Other embodiments are described and claimed.