Hardware Filter for Video Deblocking Filtering

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Solution Overview

Problem

Deblocking filtering in video compression is computationally intensive, power-consuming, and halts processor tasks during encoding, particularly in low bit rate transmission systems and devices like cellular phones, where efficient methods are needed to reduce computational load and maintain image quality.

Innovation Solution

A system-on-chip architecture with an Integrated Processing Unit (IPU) performs deblocking filtering, reducing the computational load on the main processing unit by utilizing a hardware filter that operates in parallel, allowing the main processing unit to execute other tasks without stalling, and determines whether to apply loop or post deblocking filtering based on processed frame portions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a processor executes software to implement deblocking filtering, then the filtering can be performed, but the processor is power consuming and occupied with many tasks that are halted during the whole encoding process

Engineering Contradiction:
Improvefiltering performanceVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent extracts the deblocking filtering function from the general-purpose processor and implements it as a dedicated hardware filter unit. This separation allows the processor to perform other tasks while the hardware filter handles deblocking operations independently, reducing power consumption and eliminating task halts.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces a dedicated hardware filter unit as an intermediary component between the processor and the video processing pipeline. This intermediary handles the computationally intensive deblocking filtering, allowing the processor to remain occupied with other tasks without being halted.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If a processor executes software to implement deblocking filtering, then the filtering can be performed, but the processor is occupied with many tasks that are halted during the whole encoding process

Engineering Contradiction:
Improvefiltering performanceVSAvoidprocessing efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent extracts the deblocking filtering function from the general-purpose processor and implements it as a dedicated hardware filter unit. This separation allows the processor to perform other tasks while the hardware filter handles deblocking operations independently, improving overall processing efficiency.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces a dedicated hardware filter unit as an intermediary component between the processor and the video processing pipeline. This intermediary handles the computationally intensive deblocking filtering, allowing the processor to remain occupied with other tasks without being halted.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If strong quantization operation is applied in low bit rate transmission systems, then compression efficiency is improved, but blocking artifacts appear at the boundary of adjacent blocks

Engineering Contradiction:
Improvecompression efficiencyVSAvoidblocking artifacts
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The patent applies deblocking filtering that converts the harmful blocking artifacts into beneficial smooth transitions at block boundaries. The filter processes the quantized coefficients to reduce discontinuities, transforming the artifact problem into an improved visual quality solution while maintaining compression efficiency.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Data Source

PatentUS7738563B2Method and system for performing deblocking filtering
Publication Date: 2010.06.15 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US7738563B2 patent drawing
  • US7738563B2 patent drawing
  • US7738563B2 patent drawing

AI summary

A system and method for filtering a frame, the method includes: (i) processing, by a processing unit executing instructions, at least one portion of a frame to provide at least one processed frame portion; (ii) performing, by a hardware filter, deblocking filtering of the at least one processed frame portion to provide at least one filtered frame portion; and (ii) storing the at least one filtered frame portion in a memory unit that is accessible by the processing unit; whereas the stage of processing is responsive to previously filtered frame portions. The system includes: (i) a processing unit, adapted to execute instructions such as to process at least one portion of a frame to provide at least one processed frame portion; (ii) a hardware filter, connected to the processing unit, adapted to deblocking filter the at least one processed frame portion to provide at least one filtered frame portion; and (iii) a memory unit, connected to the processing unit, adapted to store the at least one filtered frame portion; whereas the processing unit is adapted to process the at least one portion in response to previously filtered frame portions.