Hardware Flow Classifier for Router Packet Processing

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Solution Overview

Problem

Current routers face inefficiencies due to CPU overload when determining packet flows, leading to multiple entries in flow data structures and wasted processing time, as packets from the same flow may be incorrectly identified as missed flows and re-added to the data structure.

Innovation Solution

Implementing a hardware assist that ensures the CPU adds only one entry to the flow data structure for each unique signature, using a flow classifier circuit block and list walking circuit to recognize subsequent packets as belonging to the same entry, thereby preventing duplicate entries and optimizing CPU processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If hardware is used to classify packet flows, then packet processing speed is improved, but the ability to handle new protocols deteriorates

Engineering Contradiction:
Improvepacket processing speedVSAvoidprotocol adaptability
Core Design Contradiction:
SpeedVSAdaptability or versatility

Solution Approach 1:

The patent divides the packet classification function into two segments: hardware-based flow classification for speed and software-based protocol handling for adaptability. The hardware flow classifier identifies packet flows using hardware accelerators, while the software component manages protocol-specific processing, allowing both speed and adaptability to coexist

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a flow classification data structure as an intermediary between hardware and software components. This data structure stores flow identification information that the hardware can quickly access, enabling the hardware to operate at high speed while the software maintains protocol flexibility through the same intermediary structure

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If the CPU processes every packet to determine flow membership, then flow classification accuracy is improved, but CPU processing time increases

Engineering Contradiction:
Improveflow classification accuracyVSAvoidCPU processing time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent implements preliminary flow classification in hardware before packets reach the CPU. The flow classification data structure is pre-populated with flow identification information, allowing the hardware to quickly determine flow membership without requiring CPU intervention for every packet, thus maintaining accuracy while reducing processing time

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent replaces the mechanical CPU-based flow classification system with a hardware-based flow classifier that uses dedicated circuitry and data structures. This substitution maintains classification accuracy by using the same logical approach but executes it in hardware, dramatically reducing the time required for flow determination

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Reliability

If the flow data structure is checked for every packet, then duplicate flow entries are prevented, but processing overhead increases

Engineering Contradiction:
Improveflow entry accuracyVSAvoidprocessing throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies local quality by making the flow classification data structure hardware-accessible and optimized for quick lookup. The data structure is organized with specific fields (flow identification, next pointer) that enable efficient hardware traversal, allowing duplicate detection to occur rapidly without significantly impacting overall processing throughput

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS8228908B2Apparatus for hardware-software classification of data packet flows
Publication Date: 2012.07.24 CISCO TECHNOLOGY INC
  • US8228908B2 patent drawing
  • US8228908B2 patent drawing
  • US8228908B2 patent drawing

AI summary

An apparatus for routing data packets includes a network interface, a memory, a general purpose processor and a flow classifier. The memory stores a flow structure. Every packet in one flow has identical values for a set of data fields in the packet. The memory stores instruction that cause the processor to receive missing flow data and to add the missing flow to the flow structure. The apparatus forwards a packet based on the flow. The flow classifier determines a particular flow and whether it is already stored in the flow structure. If not, then the classifier determines whether that flow has already been sent to the processor as missing data. If not, then the classifier stores into a different data structure data that indicates the flow has been sent to the processor but is not yet included in the flow data structure, and sends missing data to the processor.