Hardware Hash Module for Device Programming Speed
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Solution Overview
Problem
Existing device programming systems face inefficiencies in programming and verifying programmable devices, particularly in terms of speed and throughput, due to the lack of integrated solutions for handling different interface protocols and ensuring data integrity across various manufacturing processes.
Innovation Solution
A device programming system that incorporates a hardware hash module and a smart bridge unit to facilitate faster programming and verification by translating between eMMC and UFS protocols, utilizing a FPGA-based hash module for efficient hash calculation and verification, enabling the use of existing software with larger memory sizes and improving data integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If software-based hash calculation is used for verification, then system flexibility is maintained, but programming and verification speed is insufficient
Solution Approach 1:
The patent replaces software-based hash calculation with a hardware hash module that performs cryptographic hash operations in parallel, achieving speeds up to 100 times faster than software implementation while maintaining system flexibility through modular design
Solution Approach 2:
The smart bridge unit acts as an intermediary between the eMMC interface and UFS protocol, translating commands and data while coordinating the hardware hash module's operations, thus resolving the complexity of integrating hardware acceleration without disrupting existing software architectures
2Productivity
If separate programming equipment is used for different device types, then device compatibility is achieved, but system throughput is limited
Solution Approach 1:
The smart bridge unit implements multiple protocol translations (eMMC to UFS, different memory interfaces) within a single device, allowing one programming system to handle various device types simultaneously, thereby increasing throughput without requiring separate equipment for each device category
Solution Approach 2:
The patent combines the hash calculation function, protocol translation, and verification operations into an integrated smart bridge unit, eliminating the need for separate verification equipment and reducing system complexity while improving throughput
3Reliability
If data verification is performed after programming completes, then verification accuracy is ensured, but total programming time increases
Solution Approach 1:
The hardware hash module begins calculating hash values of programmed data immediately after data is written to the device, before the programming operation officially completes. This preliminary hash calculation overlaps with subsequent system operations, ensuring verification accuracy while eliminating dedicated verification time from the critical path
Data Source
AI summary
A system and method of operation of a device programming system includes a hardware-based hash module for calculating cryptographic hashes at high-speed using electronic circuitry configured to directly calculate the hash value for a data block. Different protocols and data block sizes can be used as necessary. The hash module can be configured to calculate a hash for a data block, validate a data block based on a hash value, or a combination thereof. The hash values can be buffered in memory to allow for the difference in speed required to calculate and verify the hash values and the availability of data based on data delivery speeds.