Hardware Load Balancer for Parallel Processors
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Solution Overview
Problem
Conventional software-based load balancers experience non-deterministic latency in decision cycles, leading to suboptimal load balancing under bursty conditions, as they fail to respond quickly enough to changes in processing load and resource availability in server systems.
Innovation Solution
A hardware logic system that directs incoming processing data units to application instances by producing expressions of availability and using these expressions to select appropriate processing systems for load balancing, minimizing decision cycle latencies through hardware-based real-time monitoring and decision-making.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If software-based load balancers are used, then implementation simplicity is maintained, but decision cycle latency becomes non-deterministic and increases under bursty load conditions
Solution Approach 1:
The patent replaces the software-based load balancer with a hardware logic system that uses dedicated hardware circuits to monitor application instance availability and make load balancing decisions. This substitution of software control with hardware logic eliminates the non-deterministic latency inherent in software execution, providing fixed and predictable decision cycle times while maintaining the functional simplicity of load balancing operations.
2Adaptability or versatility
If software-based load balancers are used, then programming flexibility is maintained, but responsiveness to real-time load changes deteriorates
Solution Approach 1:
The patent implements responsiveness to real-time load changes through hardware logic circuits that continuously monitor the availability status of application instances and immediately react to changes. This hardware-based approach eliminates the iterative software execution delays, enabling the load balancer to respond at hardware speed to dynamic load conditions while maintaining adaptability through configurable hardware logic.
3Loss of time
If hardware logic systems are used, then decision cycle latency becomes deterministic and minimal, but system complexity increases
Solution Approach 1:
The patent divides the load balancing system into separate functional hardware modules: availability monitoring units that track individual application instance status, a selection logic unit that processes availability information and determines target instances, and packet forwarding units that route traffic. This segmentation of the hardware system into dedicated functional blocks manages the inherent hardware complexity by organizing it into modular, maintainable components while achieving deterministic performance.
4Productivity
If hardware logic systems are used, then real-time processing capability is enhanced, but manufacturing complexity increases
Solution Approach 1:
The patent designs the hardware logic system with universal components that can be configured to handle different load balancing scenarios and application types through programmable elements and configurable interconnection patterns. This universality allows the same hardware architecture to adapt to various real-time processing requirements without requiring complete redesign, thereby managing manufacturing complexity while maintaining enhanced real-time processing capability.
Data Source
AI summary
Invented systems and methods provide a scalable architecture and hardware logic algorithms for intelligent, realtime load balancing of incoming processing work load among instances of a number of application programs hosted on parallel arrays of manycore processors, which can be dynamically shared among the hosted applications according to incoming processing data load variations for each of the application instances as well as the processing capacity entitlements of the individual applications.