Hardware Load Counter for Processor Frequency Modulation
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Solution Overview
Problem
Current load measurement algorithms in Android and Linux systems, such as WALT and PELT, lead to slow load changes and frequency modulation, resulting in poor user experience and increased CPU overhead due to software implementation.
Innovation Solution
An electronic device equipped with a load counting hardware structure that counts processor and task loads within a window period and updates these loads to system memory, allowing for timely and accurate load data acquisition and reducing CPU overhead.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If software-based load measurement algorithms (WALT/PELT) are used, then load balancing and DVFS control are achieved, but computational efficiency is low and CPU overhead is high
Solution Approach 1:
The patent replaces the software-based load measurement mechanism with a hardware-based load counter. The load counter is implemented as a dedicated hardware module that independently counts task execution times and calculates load values without involving the CPU's software processing resources. This substitution eliminates the computational overhead of WALT/PELT algorithms while maintaining load measurement functionality.
Solution Approach 2:
The patent introduces a load counter as an intermediary hardware component between the task scheduler and the DVFS controller. This load counter acts as a dedicated measurement device that collects load data from task execution and provides it to the DVFS controller, separating the measurement function from the CPU's software processing path and reducing overall system overhead.
2Loss of information
If software-based load measurement algorithms are used, then load data is collected, but the load changes slowly leading to delayed frequency modulation
Solution Approach 1:
The patent replaces the software-based load measurement mechanism with a hardware-based load counter. The load counter is implemented as a dedicated hardware module that independently counts task execution times and calculates load values without involving the CPU's software processing resources. This substitution eliminates the computational overhead of WALT/PELT algorithms while maintaining load measurement functionality.
Solution Approach 2:
The patent introduces a load counter as an intermediary hardware component between the task scheduler and the DVFS controller. This load counter acts as a dedicated measurement device that collects load data from task execution and provides it to the DVFS controller, separating the measurement function from the CPU's software processing path and reducing overall system overhead.
3Measurement precision
If smaller window size is used in WALT algorithm, then load measurement precision is improved, but CPU overhead is significantly increased
Solution Approach 1:
The patent replaces the software-based load measurement mechanism with a hardware-based load counter. The load counter is implemented as a dedicated hardware module that independently counts task execution times and calculates load values without involving the CPU's software processing resources. This substitution eliminates the computational overhead of WALT/PELT algorithms while maintaining load measurement functionality.
Solution Approach 2:
The patent changes the implementation medium from software to hardware, fundamentally altering the operational parameters. The load counter operates in hardware with fixed timing mechanisms and direct counting logic, eliminating the need for software-based window management and iterative calculations that burden the CPU when using small window sizes.
Data Source
AI summary
An electronic device includes one or more processors, a load counting hardware structure, and a system memory. The one or more processors are connected to the load counting hardware structure. The one or more processors and the load counting hardware structure are respectively connected to the system memory. The load counting hardware structure is configured to respond to first trigger information to count a first load corresponding to each processor and a second load corresponding to each task in a window period, and update each of the first load and the second load to the system memory.


