Hardware Lock Elision for Remote Memory Conflict Reduction

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Solution Overview

Problem

Multithreaded processing slows down due to serialized memory access issues, particularly when threads access the same memory region, leading to unnecessary locking and conflicts in remote memory access scenarios.

Innovation Solution

Implementing hardware lock elision (HLE) techniques to control remote memory access by using an interface that receives transaction requests, determines conflicts with caching agents, and either performs or delays transactions based on conflict status, employing arbitration to ensure non-conflicting operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If threads use locking mechanisms to access shared memory regions, then data consistency is maintained, but processing speed decreases due to serialization

Engineering Contradiction:
Improvedata consistencyVSAvoidprocessing speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments the hash table into multiple sections, allowing different threads to access different sections simultaneously without locking the entire structure. This enables parallel processing while maintaining data consistency through selective locking of only the affected sections.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic locking where locks are acquired and released based on actual access patterns. The locking mechanism transitions from static (entire hash table locked) to dynamic (only necessary sections locked), allowing threads to proceed without unnecessary serialization.

Inventive Principle:
Principle #15Dynamics

2Reliability

If the entire hash table is locked to prevent conflicts, then data integrity is protected, but thread throughput is reduced

Engineering Contradiction:
Improvedata integrityVSAvoidthread throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The hash table is divided into multiple sections that can be accessed independently. Each section has its own locking mechanism, allowing concurrent access to different sections while maintaining integrity through localized locking rather than global locking.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies locking only to the specific sections of the hash table that are being accessed, rather than locking the entire structure. This local locking approach protects data integrity in affected regions while allowing other regions to be accessed simultaneously by different threads.

Inventive Principle:
Principle #3Local quality

3Adaptability or versatility

If remote memory access is enabled for distributed processing, then system scalability is improved, but memory access conflicts increase

Engineering Contradiction:
Improvesystem scalabilityVSAvoidmemory access conflicts
Core Design Contradiction:
Adaptability or versatilityVSObject-generated harmful factors

Solution Approach 1:

The patent segments memory access into distinct regions with independent locking mechanisms. Remote threads can access different memory sections simultaneously without causing conflicts, as each section is protected by its own lock rather than a global lock.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a caching agent as an intermediary between remote threads and memory. The caching agent manages locking and access coordination, allowing remote threads to access memory efficiently while preventing conflicts through centralized coordination of access requests.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10922265B2Techniques to control remote memory access in a compute environment
Publication Date: 2021.02.16 INTEL CORP
  • US10922265B2 patent drawing
  • US10922265B2 patent drawing
  • US10922265B2 patent drawing

AI summary

Various embodiments are generally directed to an apparatus, method and other techniques to receive a transaction request to perform a transaction with the memory, the transaction request including a synchronization indication to indicate utilization of transaction synchronization to perform the transaction. Embodiments may include sending a request to a caching agent to perform the transaction, receiving a response from the caching agent, the response to indicate whether the transaction conflicts or does not conflict with another transaction, and performing the transaction if the response indicates the transaction does not conflict with the other transaction, or delaying the transaction for a period of time if the response indicates the transaction does conflict with the other transaction.