Hardware Logger for CPU-Independent System Status Logging
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Solution Overview
Problem
Software-based logging in network components is vulnerable to CPU failures, leading to potential loss of critical data during field failures, as it requires a working kernel and flash device, and suffers from high write latency and resource consumption.
Innovation Solution
A black box recorder apparatus with a data logging port, external access port, first memory, and command memory, utilizing a state machine to write data to the first memory while locking out access, and enabling read access through the external access port and command memory, ensuring data integrity even if the CPU crashes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If software-based logging is used, then logging functionality is provided, but reliability deteriorates due to vulnerability to CPU failures
Solution Approach 1:
The patent extracts the logging functionality from the software layer and implements it as dedicated hardware circuitry. The hardware logger includes a state machine, memory interface, and locking mechanism that operate independently of the CPU and operating system, eliminating software dependency while maintaining reliable logging functionality.
Solution Approach 2:
The patent introduces a hardware intermediary between the serial data source and the memory storage. This intermediary hardware logger manages the data capture and storage process through dedicated circuitry, including a lockout mechanism that prevents conflicts between reading and writing operations, ensuring reliable logging without software intervention.
2Reliability
If flash memory is used for logging, then data persistence is achieved, but write latency increases significantly
Solution Approach 1:
The patent segments the memory interface into separate read and write paths with independent timing control. The lockout mechanism divides access to the memory device into distinct phases, allowing the write operation to complete quickly without waiting for read operations or block alignment requirements, thus reducing write latency while maintaining persistence.
3Ease of operation
If CPU executes logging operations, then logging is implemented, but system resources are consumed and CPU is burdened
Solution Approach 1:
The patent implements self-service logging where the dedicated hardware logger autonomously captures serial data and manages memory writes without requiring CPU involvement. The state machine automatically handles data buffering, memory locking, and write operations, freeing the CPU from logging tasks while maintaining ease of operation.
4Ease of operation
If memory access is not locked out, then read access is enabled, but data integrity is compromised during simultaneous write operations
Solution Approach 1:
The patent implements a lockout mechanism that prevents simultaneous read and write access to memory before conflicts can occur. The state machine monitors access conditions and blocks concurrent operations in advance, ensuring data integrity is maintained while still allowing memory access when conditions are safe.
Data Source
AI summary
An apparatus for recording data received in serial form is provided. The apparatus includes a data logging port, an external access port, a first memory, and a command memory and a state machine executing on a processor internal to the apparatus, that writes the data, received in serial form through the data logging port, to the first memory while locking out access to the first memory via the bus interface and the command memory. The bus interface and the command memory are configured to read the first memory, when not locked out, in accordance with a command placed in the command memory through the bus interface. A method performed by the apparatus is also provided.