Hardware Memory Manager for Coherent Multi-Core Memory Allocation
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Solution Overview
Problem
Challenges arise in maintaining memory coherency and regulating access to shared memory resources across multiple computing resources, particularly in embedded hardware systems where software solutions lack flexibility and hardware solutions lack efficiency.
Innovation Solution
A hardware memory manager that groups memory into blocks represented by allocation state bits, calculates memory pointers through a multi-phase process, and includes a hardware-based semaphore to manage access to shared resources, ensuring coherency and efficient memory allocation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a hardware-based memory manager is implemented to improve memory allocation speed and coherency, then memory management efficiency and access control are improved, but chip area and power consumption increase
Solution Approach 1:
The memory is divided into multiple blocks, with each block represented by an allocation state bit. This segmentation allows the hardware memory manager to efficiently track and manage memory allocation at a granular level, improving memory management efficiency while keeping the hardware structure manageable.
Solution Approach 2:
The patent employs a two-phase memory pointer calculation approach: first calculating pointers for consecutive pairs of ranges, then calculating pointers for individual ranges. This dimensional decomposition of the calculation process reduces the hardware complexity and chip area required for the memory manager while maintaining fast allocation speed.
2Productivity
If a hardware-based memory manager is implemented to improve memory allocation speed, then productivity is improved, but power consumption increases
Solution Approach 1:
The hardware memory manager performs partial calculations in the first phase (consecutive pairs of ranges) and completes the full calculation in the second phase (individual ranges). This staged approach reduces the immediate power consumption during memory allocation operations while maintaining overall allocation speed, as not all memory pointers need to be recalculated simultaneously.
3Reliability
If memory is grouped into blocks with allocation state bits to improve memory coherency, then memory access control is improved, but device complexity increases
Solution Approach 1:
All memory blocks are treated uniformly with the same allocation state bit representation and follow the same two-phase pointer calculation process. This homogeneity simplifies the hardware memory manager's design and operation, making the system easier to implement and maintain while ensuring consistent memory coherency across the entire memory space.
Data Source
AI summary
In some examples, a device includes a set of registers and a hardware memory manager coupled to a register of the set of registers. The hardware memory manager is configured to determine a mapping of a memory into a plurality of blocks, each block represented by an allocation state bit, group the blocks into a plurality of ranges, determine first memory pointers for each consecutive pair of ranges based on the allocation state bits, determine second memory pointers for a subset of blocks of each consecutive pair of ranges after determining the memory pointers for each consecutive pair of ranges, and store the memory pointers in the register.