Hardware Memory Resource Allocation via Mapped Registers

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Solution Overview

Problem

In data networks, input/output systems spend excessive CPU cycles managing memory resources, such as data buffers and memory descriptors, which limits performance and reduces the capacity for higher-level functions due to the high rate of buffer management operations.

Innovation Solution

A method and system for memory resource allocation using a memory mapped register interface and an array of pool-specific configuration records stored in hardware registers or RAM, where memory resource allocation requests are serviced by interacting with resource lists using pointers in the configuration records, advancing and updating these pointers to efficiently allocate and deallocate memory resources.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If software manages memory resources for buffer allocation and deallocation, then memory management functionality is achieved, but CPU cycles are excessively consumed

Engineering Contradiction:
Improvebuffer management operation rateVSAvoidCPU cycle consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent replaces software-based memory management with a hardware-based system using memory-mapped I/O registers. The hardware buffer manager directly manages buffer pools through register operations, eliminating the need for software intervention in buffer allocation and deallocation, thus drastically reducing CPU cycle consumption while maintaining high management operation rates

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The hardware buffer manager autonomously handles buffer allocation and deallocation without requiring software management. The system uses pointer fields in configuration records to automatically track and manage buffer resources, enabling self-service operation that frees CPU cycles for higher-level functions

Inventive Principle:
Principle #25Self-service

2Productivity

If hardware-based memory resource allocation is implemented, then CPU cycles are conserved, but system complexity increases

Engineering Contradiction:
ImproveCPU cycle availabilityVSAvoidmemory management system complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The hardware buffer manager is designed as a universal memory management unit that can handle multiple buffer pools through memory-mapped registers. The same hardware structure serves multiple functions (allocation, deallocation, tracking) across different buffer pools, reducing overall system complexity despite the hardware-based approach

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent uses configurable parameters stored in memory-mapped registers (such as pointer fields, pool identifiers, and buffer descriptors) to control the hardware buffer manager's behavior. By changing these parameters, the system can adapt to different memory management scenarios without requiring complex control logic, thus managing complexity through parameterization

Inventive Principle:
Principle #35Parameter changes

3Adaptability or versatility

If memory buffers are shared among multiple entities, then resource utilization is improved, but access coordination becomes complex requiring shared memory locks

Engineering Contradiction:
Improvememory buffer sharing capabilityVSAvoidaccess coordination mechanism
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent replaces software-based access coordination (locks) with hardware-based pointer management. The hardware buffer manager uses pointer fields in configuration records to track buffer allocation states, enabling multiple entities to access shared buffers without requiring complex locking mechanisms, thus simplifying access coordination while maintaining versatile sharing capability

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS11249805B2Methods and systems for hardware-based memory resource allocation
Publication Date: 2022.02.15 PENSANDO SYSTEMS INC
  • US11249805B2 patent drawing
  • US11249805B2 patent drawing
  • US11249805B2 patent drawing

AI summary

Methods and systems for memory resource allocation are disclosed. In an embodiment, a method for memory resource allocation involves reading a pool-specific configuration record from an array of memory mapped pool-specific configuration records according to a memory resource allocation request that is held in an address register of a memory mapped register interface, performing a memory resource allocation operation to service the memory resource allocation request, wherein performing the memory resource allocation operation involves interacting with a resource list according to a pointer in the pool-specific configuration record, advancing the pointer after the interaction, and updating the pointer in the pool-specific configuration record with the advanced pointer.