Hardware-Automated Memory Writes During Asynchronous Power Loss

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing memory sub-systems face inefficiencies during power failures, particularly with asynchronous power loss events, as they struggle to manage write command execution efficiently, leading to wasted memory space and performance impacts due to the need for firmware involvement in determining atomicity size compliance.

Innovation Solution

Implementing a hardware automation component to automatically execute write commands that meet an atomic write unit size without firmware intervention, and segmenting larger commands into smaller segments for execution by the hardware component if they exceed the atomic size.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If firmware is involved in determining atomicity size compliance, then write command execution can be verified for correctness, but system performance deteriorates and memory space is wasted during power failures

Engineering Contradiction:
Improvewrite command execution correctnessVSAvoidsystem performance during power failure
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The hardware automation component performs self-service by automatically determining whether a write command meets atomicity size requirements and executing it without requiring firmware intervention. The hardware component independently checks the command size against the atomic write unit threshold and executes compliant commands directly, eliminating the performance bottleneck caused by firmware involvement during power failure events.

Inventive Principle:
Principle #25Self-service

2Productivity

If larger write commands are executed as-is, then data storage efficiency improves, but memory space is wasted when commands exceed atomic write unit size during power failures

Engineering Contradiction:
Improvedata storage efficiencyVSAvoidmemory space waste
Core Design Contradiction:
ProductivityVSLoss of substance

Solution Approach 1:

The system segments larger write commands into smaller portions that each fit within the atomic write unit size threshold. The hardware automation component divides the command data into multiple segments, processes each segment independently, and executes them sequentially. This segmentation allows the system to maintain storage efficiency for large commands while preventing memory space waste by ensuring each executed segment complies with the atomicity size requirement.

Inventive Principle:
Principle #1Segmentation

3Speed

If hardware automation executes commands immediately, then response time improves, but commands exceeding atomic size cannot be executed properly

Engineering Contradiction:
Improvecommand execution speedVSAvoidcommand execution completeness
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The hardware automation component dynamically adapts its behavior based on the command size. For commands within the atomic write unit size, it executes them immediately for fast response. For commands exceeding the threshold, it dynamically segments them into smaller units and executes each segment sequentially. This dynamic approach maintains high execution speed for compliant commands while ensuring complete and reliable execution for larger commands through segmentation.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS12405726B2Managing write command execution during a power failure in a memory sub-system
Publication Date: 2025.09.02 MICRON TECHNOLOGY INC
  • US12405726B2 patent drawing
  • US12405726B2 patent drawing
  • US12405726B2 patent drawing

AI summary

A system includes a memory device and a processing device, operatively coupled with the memory device, to perform operations including: detecting an asynchronous power loss event at the memory device; receiving, from a host system, a memory access command; determining that a size of the memory access command satisfies a threshold criterion, wherein the threshold criterion corresponds to an atomic write unit size; responsive to determining that the size of the memory access command satisfies the threshold criterion, executing the memory access command using a hardware component of the memory device; and responsive to executing the memory access command, notifying the host system of completion of execution of the memory access command.