Hardware Message Passing Interface for Inter-Core Communication
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Solution Overview
Problem
Traditional inter-core communication methods, such as shared memory, suffer from longer message passing delays and require software management, which increases overhead and complexity.
Innovation Solution
Implementing end-to-end hardware message passing using a device with a message memory, controller, and directly connected input and output interfaces to manage messages in hardware, reducing the need for software intervention and shortening data access paths.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If shared memory is used for inter-core communication, then cross-transmission between multiple cores is enabled, but message passing delay increases due to longer paths and bus competition
Solution Approach 1:
The patent segments the message passing function into dedicated input and output interfaces, each with separate buffers and control logic. This segmentation allows independent message acquisition and provision operations, eliminating the need for message creators and users to share common memory access paths, thereby reducing bus competition and delay while maintaining multi-core transmission capability
Solution Approach 2:
The patent introduces dedicated message input and output interfaces as intermediary components between message creators/users and the core system. These interfaces act as mediators that handle message buffering, status monitoring, and data transfer independently, removing the bottleneck of shared memory access and reducing message passing delay
2Quantity of substance
If shared memory is used for message storage, then temporary message storage is enabled, but software management overhead increases for message queue management
Solution Approach 1:
The message input and output interfaces are designed with self-service capabilities, automatically monitoring their own buffer statuses and managing message flow without external software intervention. The interfaces independently handle message acquisition, buffering, and provision operations, eliminating the need for software-managed message queues and reducing management overhead
Solution Approach 2:
The patent replaces the software-based message queue management system with a hardware-based automatic control system. The message interfaces use hardware logic to monitor buffer statuses and control message flow, substituting mechanical/software operations with hardware-level automation, thereby reducing software management overhead while maintaining storage capacity
3Loss of time
If directly connected interface is used for message passing, then message passing delay is reduced, but processor extendibility is required and software management is still needed
Solution Approach 1:
The message input and output interfaces are designed as universal components that can be integrated into standard processor architectures without requiring processor extendibility. The interfaces provide multi-functional capabilities including message buffering, status monitoring, and automatic control, allowing direct-connected message passing to be achieved through add-on interfaces rather than processor modifications
4Productivity
If directly connected interface is used for message passing, then message passing efficiency is improved, but software management overhead is not reduced
Solution Approach 1:
The message interfaces are designed with self-service capabilities that automatically manage message flow based on buffer statuses. The interfaces independently perform message acquisition, buffering, and provision operations without requiring software intervention, thereby maintaining high message passing efficiency while eliminating software management overhead
Data Source
AI summary
A method and device for implementing end-to-end Hardware Message Passing (HMP) are disclosed. The device includes: a message memory, a controller, a message input interface and a message output interface. The message memory is configured to temporarily store a message. The controller is configured to perform management on a message in the form of hardware, store a message obtained from the message input interface into the message memory, and read a message from the message memory and transmit the message to a message user via the message output interface. The message input interface is directly connected with a message creator and is configured to obtain a message created by the message creator under the control of the controller. The message output interface is directly connected to the message and is configured to provide a message to the message user under the control of the controller. The disclosure can improve the efficiency of message passing and reduce software management overhead.


