Hardware ML Output Control for No-Latency Noise Filtering

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Solution Overview

Problem

Critical systems, such as flight-critical systems in aircraft, face vulnerabilities due to common-mode failures and software-based controller vulnerabilities, including cyber threats and response delays from traditional signal processing techniques like finite impulse response filters.

Innovation Solution

A hardware-based machine learning system with three machine learning models, each implemented in a hardware processor, that performs feature creation and output combination to provide a robust, no-latency control solution, capable of eliminating noise and spikes without adding processing delay, and can be used as a redundant dissimilar channel or backup to traditional software-based control systems.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional software-based controllers are used, then system functionality is achieved, but software vulnerabilities and cyber threats create reliability issues

Engineering Contradiction:
Improvecontroller reliabilityVSAvoidsoftware vulnerabilities
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent replaces software-based control systems with a hardware-based machine learning system implemented in field-programmable gate arrays (FPGAs). This substitution eliminates software vulnerabilities and cyber threats by moving the control logic from a software layer susceptible to attacks to a hardware layer with inherent security advantages, while maintaining the controller's functional capabilities through machine learning models.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent implements multiple redundant machine learning models (at least two models) that can process inputs independently and produce outputs. This copying approach ensures that if one model fails or is compromised, another model can take over, providing fault tolerance and maintaining system reliability without requiring identical software copies.

Inventive Principle:
Principle #26Copying

2Reliability

If redundant independent controllers are added, then failure mitigation is improved, but system cost scales by the number of independent controllers

Engineering Contradiction:
Improvefailure mitigationVSAvoidsystem cost
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges multiple machine learning models into a single integrated hardware system implemented in one FPGA device. Instead of using multiple independent controllers, the system combines redundant models, feature creation modules, and combination logic into one unified architecture, achieving failure mitigation while avoiding the cost and complexity of multiple separate controller units.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent creates a universal hardware-based machine learning system that can perform multiple control functions simultaneously. The single FPGA-based system can implement various machine learning models (e.g., neural networks, support vector machines, decision trees) and handle different control tasks, replacing the need for multiple specialized independent controllers.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Measurement precision

If signal processing techniques like FIR filters are used, then output refinement is improved, but response delay becomes intolerable

Engineering Contradiction:
Improveoutput refinementVSAvoidresponse delay
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent changes the fundamental parameters of the processing system by transitioning from software-based signal processing to hardware-based machine learning inference. This parameter change enables real-time processing with minimal latency while maintaining output refinement through the inherent noise-filtering capabilities of machine learning models, achieving both precision and speed.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent substitutes traditional software-based signal processing techniques (like FIR filters) with hardware-based machine learning inference. This substitution eliminates the computational overhead and delay associated with software processing while maintaining or improving output quality through the model's ability to process inputs directly in hardware with parallel computation capabilities.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

4Loss of time

If hardware-based machine learning system is implemented, then response delay is eliminated, but system complexity increases

Engineering Contradiction:
Improveresponse delayVSAvoidsystem architecture
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent segments the hardware-based machine learning system into distinct functional modules: feature creation modules that prepare inputs, multiple independent machine learning models that process inputs in parallel, and a combination module that integrates outputs. This segmentation organizes the complexity into manageable, modular components that can be independently configured and maintained, reducing the perceived system complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces standardized interfaces and communication protocols as intermediaries between the hardware components. These intermediaries simplify the integration of multiple machine learning models and feature creation modules by providing uniform data exchange mechanisms, thereby reducing the complexity of system architecture while enabling real-time processing.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11429069B2Real time output control based on machine learning hardware implementation
Publication Date: 2022.08.30 HAMILTON SUNDSTRAND CORP
  • US11429069B2 patent drawing
  • US11429069B2 patent drawing
  • US11429069B2 patent drawing

AI summary

A machine learning system that includes three machine learning models implemented in a hardware processor, a first-level feature creation module, and a combination module provides an output based on one or more channel inputs. Each of the three machine learning models receives the channel inputs and additional feature inputs based on the channel inputs to produce the output. The first-level feature creation module is implemented in hardware and receives the channel inputs, performs a feature creation operation, creates the additional feature inputs, and provides the additional feature inputs to at least one of the machine learning models. The first-level feature creation operation performs a calculation on one or more aspects of the channel inputs, and the combination module receives the one or more machine learning model outputs and produce a machine learning channel output.