Accelerator Model Optimization Using Hardware Behavior Prediction

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Solution Overview

Problem

Existing neural network models face inefficiencies in operation performance due to unoptimized operation schemes and hardware behavior patterns, leading to increased memory usage and latency, especially when dealing with varying input data attributes.

Innovation Solution

A method and apparatus for model optimization that determines a graph representing operations, attributes of input data, and predicted performance based on hardware behavior, optimizing operations without changing the neural network's structure or weights, using machine learning models to enhance efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If operation schemes are not optimized for hardware behavior patterns, then neural network models can be executed with simple operation structures, but performance is degraded due to increased memory access and latency

Engineering Contradiction:
Improveneural network execution performanceVSAvoidmemory latency
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The system performs preliminary analysis of hardware behavior patterns through profiling and uses machine learning models to predict optimal operation schemes before actual neural network execution. This advance preparation allows the system to pre-determine tiling strategies, data forwarding paths, and memory access patterns that will minimize latency during runtime.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system dynamically changes operation parameters such as tiling sizes, data layout configurations, and memory access patterns based on predicted hardware behavior. By adjusting these parameters according to the specific hardware characteristics and input data attributes, the system optimizes performance without altering the fundamental neural network structure.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If operation schemes are optimized based on hardware behavior patterns, then memory access and latency are reduced, but system complexity increases due to profiling and prediction mechanisms

Engineering Contradiction:
Improvecomputational speedVSAvoidoptimization system complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system implements self-service through automated hardware profiling and self-directed optimization using machine learning models. The system independently analyzes its own hardware behavior patterns, predicts optimal operation schemes, and applies optimizations without requiring external manual configuration or complex control mechanisms.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The system introduces machine learning models as intermediaries between the hardware and the neural network execution. These models serve as mediators that translate hardware behavior patterns into optimized operation schemes, simplifying the overall system architecture by decoupling the complexity of hardware optimization from the neural network execution.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Speed

If tiling and data forwarding techniques are applied, then memory access patterns are optimized and computational speed increases, but device resource utilization becomes more complex to manage

Engineering Contradiction:
Improvecomputational speedVSAvoidresource management complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The system employs dynamic tiling and data forwarding strategies that adapt to the specific characteristics of the input data and hardware state. Tiling sizes and data forwarding paths are adjusted in real-time based on predictions from machine learning models, allowing the system to optimize for different scenarios without requiring manual configuration for each case.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system segments the neural network computation into manageable tiles and applies data forwarding techniques to optimize memory access patterns. By dividing computations into smaller units that can be processed independently and in parallel, the system improves computational speed while making resource management more systematic and controllable.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12406175B2Method and apparatus with model optimization, and accelerator system
Publication Date: 2025.09.02 SAMSUNG ELECTRONICS CO LTD
  • US12406175B2 patent drawing
  • US12406175B2 patent drawing
  • US12406175B2 patent drawing

AI summary

A method with model optimization includes: determining a graph representing operations performed in a target model; determining an attribute of input data of the target model; determining a predicted performance of the target model based on a behavior pattern of hardware that executes the target model; and optimizing the operations performed in the target model based on the graph, the attribute of the input data, and the predicted performance of the target model.