Hardware Monitors for Filtering Redundant Transactional Accesses

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Solution Overview

Problem

Current processor systems face inefficiencies in synchronizing data access among multiple software threads, particularly due to high overhead in software-based transactional memory systems, which can lead to false contention and serialization of execution, and redundant logging of operations.

Innovation Solution

The implementation of hardware-assisted filtering mechanisms, such as using filter fields and monitors to track transactional access and metadata, allowing for the acceleration of access barrier operations and reducing redundant transactional operations in Software Transactional Memory (STM) systems.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If software-based transactional memory systems are used to synchronize data access among multiple software threads, then data synchronization is achieved, but execution overhead increases and performance deteriorates

Engineering Contradiction:
Improvedata synchronizationVSAvoidexecution performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent introduces hardware monitors as intermediary components that track memory accesses and set filter fields in hardware, acting as a mediator between software transactional memory operations and the underlying hardware. This hardware intermediary eliminates the need for software to manually track and filter redundant accesses, resolving the contradiction by providing automatic filtering at the hardware level while maintaining software compatibility.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent replaces software-based filtering mechanisms with hardware-based filtering using filter fields and monitors. By substituting the software mechanical process of tracking and filtering redundant accesses with hardware-level automatic filtering, the system achieves the same data synchronization reliability while dramatically improving execution performance by eliminating software overhead.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Productivity

If hardware-assisted filtering mechanisms are implemented to track transactional access, then redundant operations are reduced, but device complexity increases

Engineering Contradiction:
Improvetransactional execution efficiencyVSAvoidhardware structure complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements hardware monitors that serve multiple functions: tracking memory accesses, setting filter fields, and providing filtering information to the transactional memory system. This multi-functional hardware component reduces the need for separate dedicated structures for each function, thereby improving transactional execution efficiency while minimizing the increase in device complexity through functional consolidation.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Productivity

If filter fields are used to track accessed data, then redundant access barrier operations are eliminated, but memory access time increases

Engineering Contradiction:
Improveaccess barrier operation efficiencyVSAvoidmemory access time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent sets filter fields in hardware monitors in advance during the first access to a memory location within a transaction. This preliminary action allows subsequent accesses to be quickly identified as redundant and filtered out without requiring full access barrier operations, thereby improving access barrier operation efficiency while minimizing additional memory access time through pre-computation of filtering information.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9280397B2Using buffered stores or monitoring to filter redundant transactional accesses and mechanisms for mapping data to buffered metadata
Publication Date: 2016.03.08 INTEL CORP
  • US9280397B2 patent drawing
  • US9280397B2 patent drawing
  • US9280397B2 patent drawing

AI summary

A method and apparatus for accelerating a Software Transactional Memory (STM) system is herein described. A data object and metadata for the data object may each be associated with a filter, such as a hardware monitor or ephemerally held filter information. The filter is in a first, default state when no access, such as a read, from the data object has occurred during a pendancy of a transaction. Upon encountering a first access to the metadata, such as a first read, access barrier operations, such as logging of the metadata; setting a read monitor; or updating ephemeral filter information with an ephemeral/buffered store operation, are performed. Upon a subsequent/redundant access to the metadata, such as a second read, access barrier operations are elided to accelerate the subsequent access based on the filter being set to the second state to indicate a previous access occurred. Additionally, mapping of data objects to ephemeral information may be provided by software, such as through a pointer to the ephemeral information associated with the data object; an offset from a base address of the data object to the ephemeral information included associated with the data object; an index into a segment containing the ephemeral information associated with the data object; mapping the data object to the ephemeral information utilizing address arithmetic; and a hash that maps the data object to ephemeral information.