Hardware Null Exception Handling in Instruction Decoders
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Solution Overview
Problem
Existing data processing systems face inefficiencies in handling null values, particularly when converting stack-based programming languages to register file-based processors, leading to increased memory storage needs and performance reductions due to frequent null checks.
Innovation Solution
Implementing a mechanism where memory access instructions compare a base register value with a predetermined null value, branching to a null value exception handler to reduce the need for additional program instructions and optimize code size, with the exception handler optionally resuming execution from a specific point post-handling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If additional program instructions are inserted to perform null checks in translated code, then null value detection capability is improved, but code size increases and execution performance deteriorates
Solution Approach 1:
The patent replaces software-based null checking mechanisms with a hardware-based solution. The instruction decoder circuitry automatically compares base register values against null values during the decoding phase, eliminating the need for separate software null check instructions. This hardware substitution performs the null detection function that would otherwise require multiple software instructions, thereby improving execution performance while maintaining code size.
Solution Approach 2:
The patent performs null value checking during the instruction decoding phase, before the actual memory access operation is executed. By checking the base register value for null during decoding rather than during execution, the system proactively identifies potential null reference errors before they cause runtime failures, improving both performance by avoiding later exception handling and maintaining reliability.
2Speed
If JIT compilation and dynamic adaptive translation are used to convert non-native code to native code, then execution speed is improved, but memory storage requirements increase significantly
Solution Approach 1:
The patent extracts and implements null checking functionality directly into the hardware instruction decoder, separate from the software translation layer. This extraction allows the translation software to focus solely on code generation without needing to embed extensive null checking logic in the translated output, potentially reducing the size of translated code while maintaining execution speed through the hardware-based null detection.
3Reliability
If software-based null detection mechanisms are implemented, then null value handling capability is improved, but processing overhead increases
Solution Approach 1:
The patent replaces software-based null detection with hardware-based detection in the instruction decoder. This substitution eliminates the processing overhead associated with software null checks, as the hardware comparison occurs automatically during the instruction decoding phase without requiring separate software intervention, thereby reducing processing overhead while maintaining comprehensive null value handling capability.
Data Source
AI summary
A processor 6 is provided with an instruction decoder 18 which is responsive to memory access instructions to determine whether the base register value being used matches a null value and if such a match occurs then branches to a null value exception handler.