Hardware Packet Forwarding Bypasses CPU for Low Latency
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Solution Overview
Problem
Conventional packet forwarding processes in network devices introduce latency due to the involvement of multiple CPUs, which is undesirable for certain networking protocols requiring low-latency responses to maintain network stability, such as PIM Bidir protocol messages.
Innovation Solution
The network device employs a hardware-based packet forwarding mechanism where data packets identified as belonging to a predetermined class, such as protocol messages, are directly forwarded between hardware components of packet forwarding elements, reducing or eliminating CPU involvement and enabling low-latency distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If packet forwarding involves multiple CPUs for processing, then packet forwarding completeness and control are improved, but latency increases
Solution Approach 1:
The patent segments packet forwarding into two paths: a fast path for latency-sensitive packets (using hardware components only) and a normal path for other packets (using full CPU processing). This segmentation allows critical packets to bypass CPU involvement while maintaining comprehensive processing for non-critical packets.
Solution Approach 2:
The patent introduces a classification mechanism that acts as an intermediary to determine whether packets should take the fast path or normal path. This intermediary classification layer enables selective bypass of CPU processing without compromising overall forwarding control.
2Loss of time
If CPU involvement is reduced for fast forwarding, then latency is reduced, but processing capability for complex packets may be compromised
Solution Approach 1:
The patent implements dynamic packet classification that adapts forwarding behavior based on packet type. Latency-sensitive packets are dynamically routed through hardware-only fast path, while other packets receive full CPU processing, making the system adaptable to different packet requirements.
Solution Approach 2:
Different forwarding treatments are applied to different packet types: fast forwarding for latency-sensitive packets and comprehensive processing for other packets. This local quality differentiation ensures each packet receives appropriate processing based on its specific requirements.
3Speed
If hardware-based forwarding is used for all packets, then forwarding speed is improved, but device complexity increases
Solution Approach 1:
Instead of applying hardware-based fast forwarding to all packets, the patent applies it only partially to latency-sensitive packets. This partial action approach achieves speed improvement where needed without the full complexity cost of hardware processing for every packet type.
Data Source
AI summary
A network device having a plurality of packet forwarding elements, each including a hardware component for receiving and forwarding data packets from and to other network devices via a plurality of input ports connected to a network. Each hardware component is configured to determine whether a received data packet is one of a predetermined class of data packets based on data in the received data packet and, if so, generate expedited processing instructions corresponding to the received data packet based on data in the received data packet. The hardware component forwards the received data packet, together with the corresponding expedited processing instructions, directly to the hardware component of all packet forwarding elements of the plurality of packet forwarding elements for processing based on the expedited processing instructions.