Hardware Page Reuse Tracker for Memory Migration
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Solution Overview
Problem
Computing systems face challenges in efficiently allocating data across multiple memory regions to meet memory bandwidth, latency, and capacity demands, particularly in determining how to migrate data between high-bandwidth, low-latency memory and larger, lower-bandwidth, higher-latency memory devices.
Innovation Solution
A system with a control unit that monitors page accesses and migrates pages from system memory to high-bandwidth memory when access thresholds are exceeded, using interrupts to facilitate data migration and employing a table to track page usage and evict entries based on access counts and timers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If data is allocated to multiple memory regions to meet bandwidth and capacity demands, then memory capacity and bandwidth are improved, but data allocation complexity increases
Solution Approach 1:
The system employs automatic page migration mechanisms where the memory management unit autonomously monitors access patterns and migrates pages between memory regions without requiring manual intervention. The hardware-based access counter and timer structures enable self-directed data allocation decisions based on observed access behavior.
Solution Approach 2:
The patent changes the parameter of data allocation from static to dynamic by continuously monitoring access counts and timers. Pages are allocated to different memory regions based on real-time access patterns, transitioning from fixed allocation schemes to adaptive parameter-based allocation that responds to changing workloads.
2Loss of time
If frequently accessed pages are migrated to high-bandwidth memory, then access latency is reduced, but memory bandwidth utilization decreases
Solution Approach 1:
The system performs preliminary migration of pages to high-bandwidth memory before they are frequently accessed. By monitoring access counts and timers in advance, the system proactively moves pages that show signs of increasing access frequency, ensuring low-latency access is prepared before it becomes critical.
Solution Approach 2:
The patent implements feedback mechanisms through hardware-based access counters and timers that continuously monitor page access patterns. This feedback information is used to dynamically adjust memory allocation decisions, migrating pages based on observed access behavior rather than static predictions.
3Measurement precision
If hardware structures are added to track page reuse, then memory allocation accuracy is improved, but device complexity increases
Solution Approach 1:
The patent segments the memory management function into separate hardware components: access counters, timers, and migration logic. Each component handles a specific aspect of page tracking independently, allowing for modular implementation that improves accuracy while keeping individual component complexity manageable.
Solution Approach 2:
The system introduces hardware intermediaries (access counters and timers) between the memory access mechanisms and the allocation decisions. These intermediary structures collect and process access information, enabling accurate page reuse tracking without requiring direct complex interactions between all system components.
Data Source
AI summary
Systems, apparatuses, and methods for tracking page reuse and migrating pages are disclosed. In one embodiment, a system includes one or more processors, a memory access monitor, and multiple memory regions. The memory access monitor tracks accesses to memory pages in a system memory during a programmable interval. If the number of accesses to a given page is greater than a programmable threshold during the programmable interval, then the memory access monitor generates an interrupt for software to migrate the given page from the system memory to a local memory. If the number of accesses to the given page is less than or equal to the programmable threshold during the programmable interval, then the given page remains in the system memory. After the programmable interval, the memory access monitor starts tracking the number of accesses to a new page in a subsequent interval.