Hardware Polling Peripheral for Low-Power I/O State Detection
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Battery-powered devices face challenges in reducing power consumption due to inefficient polling methods that require continuous processor checks and dedicated I/O pins, leading to high energy consumption and irregular wake-up behavior.
Innovation Solution
A hardware polling peripheral that operates independently of the processor to periodically poll I/O pins, using programmable registers, polling logic, and transistors to detect state changes, allowing the processor to remain in a low-power state while monitoring for input changes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If polling is used to check I/O pins for state changes, then the processor can detect input changes, but the processor must continuously check the I/O port which increases power consumption
Solution Approach 1:
The polling function is extracted from the processor and implemented as a dedicated hardware polling peripheral. This peripheral independently monitors I/O pins for state changes using hardware circuits (polling logic, state machines, and comparators) while the processor remains in low-power mode, eliminating the need for continuous processor involvement in polling operations.
Solution Approach 2:
The hardware polling peripheral performs self-service by autonomously monitoring I/O pins, detecting state changes, and generating interrupt signals without requiring processor intervention. The peripheral includes its own control logic, state machines, and configuration registers that enable it to operate independently during processor low-power states.
2Use of energy by moving object
If interrupts are used instead of polling, then power consumption is reduced, but irregular wake-up behavior occurs and a dedicated I/O pin is required
Solution Approach 1:
The I/O pin monitoring function is segmented from the processor and implemented as a separate hardware polling peripheral with dedicated polling logic and state machines. This segmentation allows the processor to wake up at regular intervals according to a configurable duty cycle while the peripheral handles asynchronous event detection, providing both regular wake-up behavior and efficient power consumption.
Solution Approach 2:
The hardware polling peripheral implements periodic polling of I/O pins according to a configurable duty cycle. The peripheral includes a state machine that transitions between active and idle states at regular intervals, enabling the processor to wake up periodically in a predictable manner while still detecting asynchronous events between wake-up periods.
3Stability of the object's composition
If pull-up or pull-down resistors are continuously energized on I/O inputs, then the I/O pins are stable, but additional current is drawn continuously
Solution Approach 1:
The pull-up and pull-down resistors are dynamically controlled based on the polling state. The hardware polling peripheral includes control logic that enables these resistors only during active polling periods when the processor is awake and during state transitions, rather than keeping them continuously energized. This dynamic control reduces current draw while maintaining I/O pin stability during critical operations.
Data Source
AI summary
Embodiments of a system, method and apparatus are described for reducing power consumption of a battery-powered electronic device. A hardware polling peripheral operates in conjunction with a CPU within the battery-powered electronic device. When the CPU enters a quiescent state in order to save power, the hardware polling peripheral begins the polling cycle that polls one or more I/O pins of the hardware polling peripheral to detect a change in state. Polling is controlled by hardware registers and digital logic circuits without the use of firmware. When the hardware polling peripheral determines that an I/O pin has changed state, it wakes the CPU from the quiescent state via an interrupt.