Hardware Queue Manager for Dynamic Task Balancing
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Solution Overview
Problem
Existing techniques for load-balancing and order-restoring in Chip Multiprocessor (CMP) platforms rely heavily on software, leading to significant performance and bandwidth drains due to overhead costs.
Innovation Solution
Implementing a Hardware Queue Manager (HQM) with task distribution circuitry, history lists, ordering queues, and ready/replay queues to dynamically balance tasks across processing units while maintaining original order, offloading software-processing tasks to hardware.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If software techniques are used for load-balancing and order-restoring, then implementation flexibility is maintained, but processor performance and bandwidth are significantly drained due to overhead
Solution Approach 1:
The patent replaces software-based load-balancing and order-restoring mechanisms with a dedicated hardware queue manager. The hardware queue manager uses hardware queues, pointers, and control logic to dynamically balance tasks across consumers and restore results to original queue order, eliminating the need for software intervention and significantly reducing overhead while maintaining implementation flexibility.
2Device complexity
If software techniques are used for load-balancing and order-restoring, then system complexity is managed through software control, but bandwidth consumption increases due to processing overhead
Solution Approach 1:
The patent extracts the load-balancing and order-restoring functions from the software layer and implements them in dedicated hardware circuitry. The hardware queue manager independently manages task distribution and result reordering using hardware queues and pointers, eliminating the need for software processing and significantly reducing bandwidth consumption while maintaining manageable system complexity through modular hardware design.
3Productivity
If tasks are dynamically balanced across consumers, then processing throughput is improved, but maintaining original queue order becomes more difficult
Solution Approach 1:
The patent implements feedback mechanisms where consumers send completion signals back to the hardware queue manager. The queue manager tracks which consumers have completed which tasks and uses this feedback information to correctly reassemble and restore results to the original queue order, ensuring both high throughput through dynamic balancing and reliable order maintenance through comprehensive tracking and feedback loops.
Data Source
AI summary
Apparatus and method for multi-core dynamically-balanced task processing while maintaining task order in chip multiprocessor platforms. One embodiment of an apparatus includes: a distribution circuitry to distribute, among a plurality of processing units, tasks from one or more workflows; a history list to track all tasks distributed by the distribution circuitry; an ordering queue to store one or more sub-tasks received from a first processing unit as a result of the first processing unit processing a first task; and wherein, responsive to a detection that all sub-tasks of the first task have been received and that the first task is the oldest task for a given parent workflow tracked by the history list, all sub-tasks associated with the first task are to be placed in a replay queue to be replayed in the order in which each sub-task was received.