Hardware Securing Module for Machine Code Integrity
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Solution Overview
Problem
Existing methods for executing machine code of secure functions by microprocessors are complex and do not effectively control the integrity of both basic blocks and control flow, making them vulnerable to fault injection attacks that can disrupt the execution of critical systems.
Innovation Solution
A method that generates binary code with machine code for secure functions, using a compiler to automatically convert source code into machine code with a hardware securing module that constructs and verifies signatures for each basic block, ensuring integrity by comparing constructed and expected values, and triggering fault signaling upon discrepancies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If known methods for executing machine code of secure functions are used, then fault detection capability is provided, but the method complexity increases and effectiveness in controlling both basic block and control flow integrity is insufficient
Solution Approach 1:
The patent merges the control flow verification and basic block integrity verification into a single unified mechanism. The hardware securing module combines the function of verifying control flow instructions (branch instructions, return addresses) and verifying basic block signatures (instruction integrity) into one integrated module that operates simultaneously for both purposes, thereby reducing overall system complexity while maintaining comprehensive security coverage.
Solution Approach 2:
The hardware securing module is designed with multi-functionality to handle multiple security verification tasks: control flow integrity verification, basic block instruction integrity verification, and fault detection. This universal module performs all verification functions using a unified approach, eliminating the need for separate complex verification mechanisms for each function and thereby reducing overall method complexity.
2Reliability
If hardware securing module with signature verification is implemented, then control flow and basic block integrity are controlled, but the execution time increases due to additional verification steps
Solution Approach 1:
The patent implements preliminary action by pre-calculating and storing expected signature values for each basic block during the compilation or code generation phase. These expected signatures are embedded in the machine code or stored in a lookup table, so that during execution, the hardware securing module only needs to compute the actual signature and compare it with the pre-prepared expected value, rather than performing complex verification calculations during runtime, thus minimizing execution time overhead.
Solution Approach 2:
The patent replaces complex software-based verification mechanisms with a dedicated hardware securing module that performs signature verification through specialized circuitry. This hardware implementation executes verification operations in parallel and at higher speeds compared to software implementations, significantly reducing the time penalty associated with integrity checks while maintaining comprehensive control flow and basic block verification.
3Object-affected harmful factors
If fault injection attacks are allowed to occur, then system vulnerability is exposed, but implementing comprehensive protection increases device complexity
Solution Approach 1:
The hardware securing module implements self-service by autonomously performing verification of control flow instructions and basic block signatures without requiring external intervention or complex external verification systems. The module independently computes signatures, compares them with expected values, and triggers fault signals when discrepancies are detected, thereby providing robust protection against fault injection attacks through a relatively simple self-contained mechanism.
Solution Approach 2:
The patent implements feedback mechanisms where the hardware securing module continuously monitors execution flow and instruction integrity, and immediately provides feedback by triggering fault signals or interrupting execution when verification failures are detected. This real-time feedback loop enables the system to respond rapidly to fault injection attempts without requiring complex external monitoring systems, achieving effective vulnerability protection with minimal added complexity.
Data Source
AI summary
An execution method comprises the following operations: —every time an instruction to be protected of a preceding basic block is loaded, constructing a new value of a signature of this preceding basic block from the value of this instruction to be protected and the preceding value of the signature. The method further includes loading an initialization vector contained in a subsequent basic block and calculating, from said loaded initialization vector, a value reached for signing the preceding basic block. The method also includes comparing the constructed value of the signature with the expected value of this signature, and—only if these values do not match, triggering the signaling of a fault during the execution of the machine code.