Hardware State Data Logger for SoC Silicon Debug
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Solution Overview
Problem
Conventional methods for debugging systems on chips (SoCs) are inadequate and inefficient, as they often fail to capture the necessary data to diagnose issues due to system timing differences and limitations in data retrieval during malfunctions.
Innovation Solution
Incorporating hardware state data loggers that can passively capture and store data in a memory device, such as a processor's L1 cache, allowing for the analysis of bus transactions and other critical events leading up to a malfunction, enabling more effective debugging.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional scan dump operations are performed to debug SoC, then the current state can be retrieved, but sufficient debugging information is not obtained due to timing differences and data incoherence
Solution Approach 1:
The patent implements preliminary action by continuously capturing and storing system state data in a buffer memory before malfunctions occur. The state capture circuit continuously monitors and records data from multiple sources (scan chains, bus interfaces, functional units) in real-time, so that when an error is detected, the relevant coherent state information is already available for analysis, eliminating the need for multiple successive scan dumps that capture incoherent timing states.
2Quantity of substance
If multiple successive scan dumps are performed to capture problem data, then more data is collected, but superfluous data is generated and problem capture is missed due to timing variations
Solution Approach 1:
The system performs preliminary continuous data capture and storage in a buffer memory, maintaining a history of system states. When an error is detected, the relevant portion of this pre-captured data can be retrieved, providing the necessary quantity of data without requiring multiple successive scan operations that generate superfluous information.
Solution Approach 2:
The patent extracts only the relevant coherent state data from the continuous capture buffer at the moment of error detection. Instead of collecting all possible data through multiple scan dumps, the system extracts precisely the data needed for debugging - the state information that was captured immediately before and during the malfunction, eliminating superfluous data while maintaining complete debugging information.
3Measurement precision
If hardware state data loggers are added to capture detailed bus transactions, then debugging insights are improved, but device complexity increases
Solution Approach 1:
The state capture circuit is designed with multi-functionality, serving both as a continuous data logger for debugging and as a normal operational component during SoC execution. The same circuit infrastructure (scan chains, bus interfaces, buffer memory) is used for both regular system operation and for capturing state data, rather than adding completely separate dedicated logging hardware, thereby improving measurement precision while limiting the increase in device complexity.
Data Source
AI summary
Systems and methods of utilizing a hardware state data logger to debug in silicon. One or more hardware state data loggers are incorporated into a circuit design and fabricated along with the functional units of the circuit into a fabricated chip. When a problem is encountered during testing of the fabricated chip, a hardware state data logger is enabled to capture and store with a final sequence of events that led to the error. The stored data is then extracted from the fabricated chip and used to determine the underlying cause of the failure.