Hardware Switch Header Extraction for Selective Packet Processing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing hardware switches in Software Defined Networking (SDN) are inflexible and inefficient due to their limited ability to process a fixed set of packet fields, leading to resource wastage and suboptimal packet processing.
Innovation Solution
A novel packet processing pipeline for reconfigurable hardware switches, comprising an ingress and egress pipeline with a parser, match-action unit (MAU), and deparser, which separates packet header fields into a primary packet header vector (PPHV) for processing and a secondary packet header vector (SPHV) for non-processing, optimizing resource utilization and enabling deeper packet header extraction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a fixed set of packet fields is processed by traditional hardware switches, then the switching logic is simple and hardware resources are limited, but the flexibility and adaptability of packet processing are reduced
Solution Approach 1:
The patent segments the packet header processing into two distinct vectors: PPHV (Primary Packet Header Vector) containing fields that will be processed by the MAU, and SPHV (Secondary Packet Header Vector) containing fields that will not be processed. This segmentation allows the switch to selectively process only relevant fields while preserving other header information, thereby improving adaptability without proportionally increasing hardware complexity.
Solution Approach 2:
The patent introduces dynamic reconfigurability to the hardware switch through the RMT architecture, allowing the switch to adapt its processing behavior based on packet type and required actions. The parser dynamically determines which fields to place in PPHV versus SPHV, and the MAU dynamically configures its processing stages, enabling flexible packet processing without requiring a completely complex fixed architecture.
2Productivity
If all packet header fields are processed by the match-action unit, then complete packet inspection is achieved, but resource wastage occurs due to processing of unused fields
Solution Approach 1:
The patent extracts only the necessary packet header fields into the PPHV that will be processed by the MAU, while separating unnecessary fields into the SPHV. This extraction principle ensures that the MAU processes only relevant fields (reducing resource wastage) while the SPHV fields are preserved and later reassembled with the payload, maintaining complete packet inspection capability when needed.
Solution Approach 2:
The patent applies partial action by processing only the subset of packet header fields that are actually needed for the current packet processing decision, rather than processing all fields. The parser identifies and extracts only the necessary fields into PPHV for MAU processing, while other fields remain in SPHV to be reassembled later, thus improving efficiency without sacrificing completeness.
3Adaptability or versatility
If a reconfigurable match table architecture is implemented, then packet processing flexibility is improved, but hardware resource utilization may be suboptimal
Solution Approach 1:
The patent applies preliminary action by having the parser pre-process the packet header and separate fields into PPHV and SPHV before the MAU processing stage. This preliminary segmentation allows the MAU to focus exclusively on processing the relevant fields in PPHV, improving hardware resource utilization by avoiding unnecessary processing of SPHV fields, while the reconfigurable architecture maintains flexibility for different packet types.
Data Source
AI summary
A method for generating configuration data for configuring a hardware switch is described. The method receives a description of functionality for the hardware switch. Based on the description, the method generates sets of match and action entries to configure the hardware switch to process packets. The method then determines, for each packet header field in a parse graph that specifies instructions for a parser of the switch to extract packet header fields from packets, whether the packet header field is used or modified by at least one match or action entry. The method generates for the parser of the hardware switch configuration data that instructs the parser to extract (i) packet header fields used or modified by at least one match or action entry to a first set of registers and (ii) packet header fields not used by any match or action entries to a second set of registers.


