Hardware Synchronization Unit for Data Processing Latency

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Solution Overview

Problem

Current data processing systems experience high latency due to the synchronization of producer and consumer processing units, particularly in multimedia subsystems, which can degrade user experience in low-powered and mobile devices, especially in gaming and virtual reality applications.

Innovation Solution

A hardware-based synchronization unit communicates with producer and consumer processing units to maintain records of data outputs and progress, allowing for synchronized operation without software involvement, enabling fractional synchronization and flexible control of synchronization intervals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If software fences are used to synchronize producer and consumer processing units, then data processing correctness is ensured, but system latency increases significantly

Engineering Contradiction:

Improvedata processing correctnessVSAvoidsystem latency

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent replaces the software-based fence mechanism with a hardware-based synchronization mechanism. The producer processing unit directly controls the consumer processing unit through hardware signals (ready signal and data ready signal) without requiring software intervention, thereby eliminating the latency introduced by software fences while ensuring data processing correctness through hardware-enforced synchronization protocols

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent introduces a hardware synchronization mechanism as an intermediary between the producer and consumer processing units. This hardware intermediary manages the ready and data ready signals to coordinate data transfer, replacing the software fence intermediary and achieving the same synchronization goal with reduced latency

Inventive Principle:

Principle #24Intermediary (Mediator)

2Reliability

If complete data output is produced before consumer processing begins, then data integrity is ensured, but processing latency increases

Engineering Contradiction:

Improvedata integrityVSAvoidprocessing latency

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent enables the consumer processing unit to begin processing operations in advance by using the ready signal to indicate when the consumer is prepared to receive data. This allows the consumer to be pre-positioned and ready, eliminating the need to wait for complete data production while maintaining data integrity through the data ready signal that confirms actual data availability

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent segments the data transfer process into distinct phases controlled by separate hardware signals: a ready signal that indicates consumer preparedness and a data ready signal that indicates actual data availability. This segmentation allows the consumer to start processing earlier in the pipeline while maintaining data integrity through staged synchronization points

Inventive Principle:

Principle #1Segmentation

3Loss of time

If hardware-based synchronization is implemented, then latency is reduced, but device complexity increases

Engineering Contradiction:

Improvesynchronization latencyVSAvoidsynchronization hardware complexity

Core Design Contradiction:

Loss of timeVSDevice complexity

Solution Approach 1:

The patent implements a universal hardware synchronization mechanism that can be applied to any producer-consumer processing unit pair within the system. The same ready and data ready signal protocol works across different processing units (video processor, GPU, display controller), eliminating the need for unit-specific synchronization hardware and reducing overall system complexity despite the added synchronization capability

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS10705886B2Synchronization of hardware units in data processing systems

Publication Date: 2020.07.07 ARM LTD

AI summary

A data processing system includes one or more producer processing units operable to produce data outputs, and one or more consumer processing units operable to use a data output produced by a producer processing unit, and a synchronization unit that is operable to communicate with the one or more producer processing units and the one or more consumer processing units, so as to synchronize the production and use of data outputs by the producer and consumer processing units.