Hardware Time Base Distribution for Precise Event Time Stamping

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Solution Overview

Problem

Current processing systems, such as micro-controllers in automotive applications, face challenges in generating and distributing a precise time reference across multiple circuits, leading to delays and inaccuracies in real-time operations due to software-generated time stamps that require multiple software layers and suffer from coarse accuracy.

Innovation Solution

A processing system with a time reference circuit that generates a system time signal using a digital counter circuit and a time base distribution circuit, providing a time base signal with variable resolution to resources, allowing for direct hardware-level time stamping of events, thereby reducing delay and improving accuracy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If software-based time stamping is used, then the processing system can implement time reference functionality, but the accuracy is coarse and delays occur due to multiple software layers

Engineering Contradiction:
Improvetime stamping accuracyVSAvoidtime stamping delay
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent replaces the software-based time stamping mechanism with a hardware-based time reference circuit. The digital counter circuit directly generates time reference signals at the hardware level, eliminating the need for software intervention and multiple processing layers, thereby achieving precise and delay-free time stamping.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent introduces a dedicated time reference circuit as an intermediary component between the clock signal source and the time stamping function. This circuit acts as a mediator that directly provides time reference signals to resources, bypassing the software stack and enabling accurate hardware-level time measurement.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If a single time reference circuit serves all resources, then the device complexity is reduced, but the adaptability to different time resolution requirements is limited

Engineering Contradiction:
Improvetime resolution adaptabilityVSAvoidtime reference circuit complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements dynamic configurability in the time reference circuit by allowing the digital counter circuit to be programmed with different prescaler values. This enables the circuit to adapt its time resolution dynamically based on the specific requirements of different resources, making a single circuit serve multiple purposes with varying precision needs.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the operational parameters of the time reference circuit by allowing programmable division ratios in the digital counter circuit. By modifying the division ratio parameter, the circuit can provide different time resolutions to different resources, achieving adaptability without requiring multiple fixed circuits.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentEP3736657B1Processing system, related integrated circuit, device and method
Publication Date: 2022.07.27 STMICROELECTRONICS APPL GMBH
  • EP3736657B1 patent drawingFigure 1~3
  • EP3736657B1 patent drawingFigure 4~5
  • EP3736657B1 patent drawingFigure 6A~7

AI summary

A processing system is described. The processing system comprises a digital processing unit (102) programmable as a function of a firmware stored to a non-volatile memory and a resource (ADC, IF1, IF2) connected to the digital processing unit (102) via a communication system (108). The processing system comprises also a time reference circuit (122) comprising a first digital counter circuit configured to generate, in response to a clock signal, a system time signal comprising a plurality of bits indicative of a time tick-count, and a time base distribution circuit configured to generate a time base signal (TBI0..TBIn) by selecting a subset of the bits of the system time signal, wherein the time base signal (TBI0..TBIn) is provided to the resource (ADC, IF1, IF2). Specifically, the resource (ADC, IF1, IF2) is configured to detect a given event, store the time base signal (TBI0..TBIn) to a register (REG1..REG3) in response to the event, and signal the event to the digital processing unit (102). Conversely, the digital processing unit (102) is adapted to, in response to the event having been signaled by the resource (ADC, IF1, IF2), read via the communication system (108) the time base signal (TBI0..TBIn) from the register (REG1..REG3).