Hardware Timestamping for Network Clock Synchronization

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Solution Overview

Problem

The existing Network Time Protocol (NTP) for synchronizing local clocks in a network environment is limited by jitter caused by variations in packet transfer time through switches, which hinders accurate synchronization of nodes.

Innovation Solution

A method and apparatus that calculate and adjust the real-time clock of a slave computer relative to a master computer by measuring and averaging time drift values using 'time freeze' packets, accounting for propagation time, to synchronize clocks effectively.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If NTP is used to synchronize local clocks by periodically transferring time packets, then clock synchronization is achieved, but jitter caused by variable packet transfer time through switches limits synchronization accuracy

Engineering Contradiction:
Improvesynchronization accuracyVSAvoidpacket transfer time variation
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent introduces a specialized timestamping mechanism that acts as an intermediary between the packet transmission system and the clock synchronization process. Hardware timestamps are inserted at specific points in the network path, providing precise measurement of packet arrival times without being affected by the jitter in the main data transmission path. This intermediary timestamping system allows accurate synchronization despite variable packet transfer times.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent replaces the software-based NTP time measurement mechanism with a hardware-based timestamping system. By using dedicated hardware circuits to generate and record timestamps, the system achieves higher precision and consistency in time measurement, eliminating the uncertainties introduced by software processing and variable network conditions.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Measurement precision

If statistical analysis is performed on obtained time data to adjust local clocks, then clock synchronization is achieved, but the jitter introduced by switches limits the precision of this adjustment

Engineering Contradiction:
Improvetime measurement precisionVSAvoidsynchronization system complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The hardware timestamping mechanism serves as an intermediary that provides precise time measurements independent of the complex NTP statistical analysis process. By inserting timestamps at known points in the network path, the system obtains accurate time data that requires minimal processing, simplifying the overall synchronization system while maintaining high precision.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Adaptability or versatility

If packet transfer time through switches is allowed to vary based on network conditions, then network flexibility is maintained, but synchronization accuracy deteriorates due to jitter

Engineering Contradiction:
Improvenetwork flexibilityVSAvoidtime synchronization precision
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The timestamping mechanism acts as an intermediary that decouples network flexibility from synchronization precision. By recording precise timestamps at the edges of the network path and using these to calculate synchronization offsets, the system can tolerate variable packet transfer times through switches while maintaining accurate synchronization.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS7768931B2Hardware-based network packet timestamps: improved network clock synchronization
Publication Date: 2010.08.03 WESTERNGECO LLC
  • US7768931B2 patent drawing
  • US7768931B2 patent drawing
  • US7768931B2 patent drawing

AI summary

A method and apparatus for synchronizing a real time clock of a slave computer with a real time clock of a master computer. The method includes the steps of: calculating a first time drift value between the real time clock of the slave computer and the real time clock of the master computer, calculating a second time drift value between the real time clock of the slave computer and the real time clock of the master computer, calculating an average time drift value between the real time clock of the slave computer and the real time clock of the master computer using the first time drift value and the second time drift value, and adjusting the real time clock of the slave computer using the average time drift value.