Hardware Write-Once Register for Stack Overflow Protection
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Solution Overview
Problem
Existing stack overflow protection methods, such as software-implemented stack canaries, are inefficient in memory-constrained systems like IoT devices and vulnerable to tampering in system-on-chip (SoC) integrated circuits, leading to ineffective protection against stack smashing attacks.
Innovation Solution
A hardware write-once register is used to store a unique numeric value as a stack canary, which is initialized during boot-up and cannot be modified, providing secure and scalable protection against stack overflow attacks without relying on memory allocation or memory management units.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If software-implemented stack canaries are used in memory-constrained systems, then stack overflow protection is provided, but memory usage increases and system complexity increases
Solution Approach 1:
The patent extracts the stack canary value from software memory storage and places it in a dedicated hardware register. This separates the protection mechanism from general memory resources, eliminating the need to allocate RAM or ROM for storing canary values while maintaining protection functionality.
Solution Approach 2:
The patent replaces the software-based stack canary implementation with a hardware-based register. This substitution eliminates the need for software memory allocation and management overhead, providing protection without consuming system memory resources.
2Reliability
If dynamic stack canaries are implemented in SoC systems, then protection against timing side-channel attacks is improved, but vulnerability to tampering increases due to read/write memory allocation
Solution Approach 1:
The patent extracts the dynamic canary value from writable memory regions and stores it in a hardware register that is inaccessible to software modification. This separates the canary storage from the memory management unit's control, preventing tampering while maintaining dynamic generation capabilities.
Solution Approach 2:
The patent prepares the canary value in advance by generating it in software and loading it into the hardware register before execution. The hardware register then provides inherent protection against tampering, cushioning the system from attacks that would otherwise modify the canary value in writable memory.
3Object-affected harmful factors
If MMU page tables are configured to protect dynamic canary memory regions, then tampering is prevented, but memory waste occurs and system complexity increases
Solution Approach 1:
The patent extracts the canary value from MMU-managed memory regions and places it in a hardware register that operates independently of the page table system. This eliminates the need to allocate and manage memory pages for canary storage, preventing both tampering and memory waste simultaneously.
Solution Approach 2:
The patent replaces the MMU-based protection mechanism with a hardware register that provides inherent write-protection. This substitution eliminates the overhead of page table configuration and memory allocation while providing equivalent or superior protection against tampering.
4Ease of manufacture
If static stack canaries are used, then implementation simplicity is maintained, but protection effectiveness decreases due to predictability
Solution Approach 1:
The patent implements a dynamic canary generation mechanism where a pseudo-random number generator creates a unique canary value for each execution. The generated value is loaded into the hardware register, providing dynamic protection that adapts to each run while maintaining implementation simplicity through hardware automation.
Data Source
AI summary
Systems and methods are disclosed for providing stack overflow protection on a system on chip via a hardware write-once register. An exemplary embodiment of an system on chip comprises a hardware write-once register, a boot processor, and one or more processor subsystems. The boot processor is configured to execute a read only memory (ROM) image which initializes the hardware write-once register with a first numeric value in response to the system on chip being powered on. The one or more processor subsystems have an associated software image configured to use the first numeric value in the hardware write-once register as a stack canary value to combat stack overflow attacks.