Harmonic Processing Circuit Using Resonance for 2nd Harmonic Suppression
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Solution Overview
Problem
Existing harmonic processing circuits struggle to achieve desired performance due to limitations in selecting inductance and capacitance values, particularly with chip components where values are fixed and cannot be freely selected.
Innovation Solution
The harmonic processing circuit includes a first inductor connected between an amplifier and an impedance matching circuit, a transmission line, and a parallel resonant circuit with a chip inductor and parasitic capacitance, ensuring an impedance greater at the fundamental wave frequency than at the second harmonic frequency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If chip components with fixed inductance and capacitance values are used in the harmonic processing circuit, then the device complexity is reduced and ease of manufacture is improved, but the ability to achieve desired performance and suppress harmonics effectively deteriorates
Solution Approach 1:
The patent changes the electrical parameters (inductance and capacitance values) of the circuit components to achieve different resonance frequencies. By selecting specific fixed values for chip inductors and capacitors, the circuit creates series resonance at the second harmonic frequency to ground it, while maintaining parallel resonance at the fundamental frequency for efficient signal transmission. This parameter optimization resolves the contradiction between using fixed-value components and achieving desired harmonic suppression performance.
Solution Approach 2:
The patent creates frequency-dependent dynamic behavior in the harmonic processing circuit. The circuit dynamically responds to different frequencies by presenting different impedance characteristics: low impedance at the second harmonic frequency for suppression, and high impedance at the fundamental frequency for signal transmission. This dynamic frequency selectivity allows fixed-value components to achieve variable performance across different frequencies, resolving the contradiction between component fixedness and performance flexibility.
2Reliability
If the impedance at the fundamental wave frequency is increased to suppress the second harmonic, then the harmonic suppression performance is improved, but the efficiency in the fundamental wave deteriorates
Solution Approach 1:
The patent uses electrical resonance (analogous to mechanical vibration) at specific frequencies to achieve harmonic suppression. By designing the circuit to resonate at the second harmonic frequency, it creates a low-impedance path to ground for the harmonic component. Meanwhile, the fundamental frequency operates at parallel resonance with high impedance, maintaining signal transmission efficiency. This resonant vibration approach resolves the contradiction between harmonic suppression and fundamental wave efficiency.
Solution Approach 2:
The patent employs periodic resonance action at different frequencies within the same circuit. The series resonant circuit periodically activates at the second harmonic frequency to suppress harmonics, while the parallel resonant circuit maintains high impedance at the fundamental frequency for efficient signal transmission. This periodic frequency-selective action allows the circuit to achieve both harmonic suppression and fundamental wave efficiency simultaneously.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration allows for effective suppression of the second harmonic while maintaining efficiency in the fundamental wave, thereby enhancing the performance of the amplification device.
Implementation Method 1
a parallel resonant circuit having a fifth end connected to the second node and a sixth end connected to a reference potential, wherein a second inductor and a first capacitor are connected in parallel between the fifth end and the sixth end
Implementation Method 2
when the first inductor is viewed from the connection line, an impedance at a frequency of a fundamental wave amplified by the amplifier is larger than an impedance at a frequency of a second harmonic having twice the frequency of the fundamental wave
Data Source
AI summary
A harmonic processing circuit includes a first inductor having a first end connected to a connection line connected between an amplifier and an impedance matching circuit, and a second end connected to a first node, a first transmission line having a third end connected to the first node and a fourth end connected to a second node, and a parallel resonant circuit having a fifth end connected to the second node and a sixth end connected to a reference potential, wherein a second inductor and a first capacitor are connected in parallel between the fifth end and the sixth end, wherein when the first inductor is viewed from the connection line, an impedance at a frequency of a fundamental wave amplified by the amplifier is larger than an impedance at a frequency of a second harmonic having twice the frequency of the fundamental wave.