Harmonic Matching Network for Class-F PA Harmonic Suppression
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Solution Overview
Problem
Current Class-F power amplifiers face challenges in achieving high output power and power added efficiency (PAE) simultaneously, especially in high-frequency applications like satellite communications, due to harmonic imperfections and limitations in substrate materials, with existing designs typically achieving either high output power or high efficiency but not both, and GaN-based MMICs at V-band frequencies reaching only 20% PAE.
Innovation Solution
A harmonic matching network topology using coupled-line capacitors, open-stubs, and quarter-wavelength transmission lines to create equivalent short-circuit and open-circuit conditions, suppressing 2nd and 3rd harmonic frequencies, and ensuring optimal impedance match for fundamental frequencies, applicable in the Ka-band to W-band range, suitable for GaAs and GaN-on-SiC technology, enabling PAE greater than 30% and output power greater than 2 W.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If Class-F power amplifier operates in switching mode to minimize power dissipation, then power added efficiency improves, but harmonics are produced that reduce output power and efficiency
Solution Approach 1:
The patent converts the harmful harmonics generated by Class-F amplifier switching operation into beneficial waveform shaping. By intentionally designing the output matching network to present specific impedances at harmonic frequencies (open circuit for odd harmonics, short circuit for even harmonics), the harmonics are used to sculpt the voltage and current waveforms to be more square-like, which reduces power dissipation in the transistor while maintaining high output power.
Solution Approach 2:
The patent introduces an output matching network as an intermediary component between the Class-F amplifier and the load. This network includes specific impedance elements (inductors, capacitors, transmission lines) that mediate the interaction between the amplifier and load by presenting controlled impedances at fundamental and harmonic frequencies, thereby enabling simultaneous achievement of high efficiency and high output power.
2Power
If existing designs optimize for high output power, then power output increases, but power added efficiency drops below 20%
Solution Approach 1:
The patent changes the impedance parameters at different frequencies within the output matching network. By designing the network to present specific impedance values at the fundamental frequency (for maximum power transfer) and different impedance values at harmonic frequencies (for waveform shaping), it achieves both high output power and high efficiency simultaneously. The specific implementation includes quarter-wave transmission lines and lumped elements with carefully selected impedance values.
3Manufacturing precision
If load-pulling technique is used to vary impedance to find optimum matching, then impedance matching improves, but the impact of harmonics is not fully addressed
Solution Approach 1:
The patent segments the frequency spectrum by treating the fundamental frequency and harmonic frequencies separately. The output matching network is designed with distinct elements that independently control impedance at the fundamental frequency (for power transfer) and at harmonic frequencies (for waveform shaping). This segmentation allows simultaneous optimization of both power transfer and harmonic control without interference.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The harmonic matching network topology effectively suppresses higher-order harmonics, achieving output power greater than 2 W and PAE greater than 30% across the Ka-band to W-band frequencies, addressing the limitations of existing designs and enabling high-efficiency power amplifiers for applications like satellite communications.
Implementation Method 1
A harmonic matching network topology using coupled-line capacitors, open-stubs, and quarter-wavelength transmission lines to create equivalent short-circuit and open-circuit conditions, suppressing 2nd and 3rd harmonic frequencies
Implementation Method 2
an impedance transformer in which quarter-wavelength transmission lines match an impedance of the overall network to a 50-ohm input/output load
Data Source
AI summary
A Class-F power amplifier includes a harmonic matching network topology comprised of circuit elements configured relative to an output network of the power amplifier. The harmonic matching network topology suppresses higher-order harmonics in such a power amplifier and includes coupled-line capacitors and open-stubs that introduce harmonic terminations in the output network, and quarter-wavelength transmission lines to match an overall network to a 50-ohm output load. The harmonic matching network topology enables the power amplifier to exhibit desired performance characteristics in specific frequency ranges for high-power applications.