Harmonic Resonator Amplifier Circuit for Parasitic-Aware Class-F Loading
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Solution Overview
Problem
Existing amplifier circuits, such as Class-F and inverse Class-F, fail to efficiently process fourth and higher-order harmonics due to the presence of parasitic elements like capacitors and inductors in transistors, especially in high-frequency regions, leading to suboptimal power efficiency.
Innovation Solution
The design incorporates a transistor equivalent circuit with a parallel parasitic capacitor and series parasitic inductor, coupled with a harmonic wave processing circuit and a resonant circuit section featuring (2n+1) resonators with distinct resonance frequencies, which align with the frequencies of poles and zeros formed between the transistor's drain output node and ground, allowing for Class-F or inverse Class-F load conditions to be satisfied over fourth and higher-order harmonics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If Class-F or inverse Class-F amplifier circuits are designed without considering parasitic elements, then theoretical 100% power efficiency can be achieved, but in actual high-frequency transistors the parasitic capacitor and inductor cannot be ignored and power efficiency remains at approximately 80%
Solution Approach 1:
The invention changes the design parameters by explicitly incorporating parasitic element values (drain-to-source capacitance and drain inductance) into the harmonic processing circuit design. The load conditions for harmonics are recalculated based on these parasitic parameters, transforming the design from an idealized model to one that accounts for real-world transistor characteristics, thereby achieving practical power efficiency improvements.
Solution Approach 2:
The invention creates a simplified equivalent circuit model that copies the essential behavior of the actual transistor including its parasitic elements. This equivalent model allows designers to perform calculations and optimizations on a simplified representation that still captures the critical parasitic effects, avoiding the need for complex full-wave simulations while achieving accurate results.
2Loss of energy
If the order of harmonics to be processed is increased in a load circuit, then better power efficiency should be achieved, but in high-frequency regions the influence of parasitic elements prevents efficiency improvement
Solution Approach 1:
The invention converts the harmful effect of parasitic elements into a beneficial design parameter. Instead of treating parasitic capacitance and inductance as unwanted obstacles, the design explicitly incorporates them into the harmonic processing circuit configuration. The parasitic elements become part of the resonant circuit design, allowing the circuit to achieve desired load conditions at harmonic frequencies despite their presence.
Solution Approach 2:
The invention introduces an equivalent circuit model as an intermediary between the ideal Class-F theory and the actual transistor implementation. This equivalent model serves as a mediator that translates theoretical design requirements into practical circuit configurations that account for parasitic elements, enabling designers to bridge the gap between ideal performance and real-world constraints.
3Ease of manufacture
If trial design is made under the assumption of no parasitic elements, then initial design can be completed, but experimental readjustment is required and it is very difficult to make adjustment simultaneously in consideration of termination conditions of a large number of harmonics
Solution Approach 1:
The invention performs preliminary calculations that explicitly include parasitic element effects in the initial design phase. By pre-calculating the load conditions for harmonics while accounting for parasitic capacitance and inductance, the design eliminates the need for subsequent experimental readjustment. All harmonic termination conditions are simultaneously optimized in advance, avoiding iterative tweaking during experimentation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables efficient processing of higher-order harmonics, achieving improved power efficiency by aligning resonance frequencies with harmonic wave frequencies, thus overcoming the limitations of parasitic elements in transistors.
Implementation Method 1
a resonant circuit section provided between an output node of the harmonic wave processing circuit and a ground node and including 2n+1 resonators having resonance frequencies different from each other; The resonance frequencies of the 2n+1 resonators are coincident with frequencies of n+1 poles and n zeros
Data Source
AI summary
An amplifier circuit operating at a fundamental angular frequency •0, includes: a transistor which is represented by an equivalent circuit which includes: an equivalent output current source, a drain-source capacitor as a parallel parasitic capacitor to an output node of the equivalent output current source, and a drain inductor as serial parasitic inductor connected between the equivalent output current source and a drain output node; a harmonic frequency processing circuit which includes an input node connected with the drain output node and an output node; a resonant circuit section provided between the output node of the harmonic frequency processing circuit and a ground node and comprising (2n+1) resonators which have resonance frequencies different from each other; and a load resistance provided in a back stage of the harmonic frequency processing circuit. The resonance frequencies of the (2n+1) resonators are coincident with frequencies of (n+1) poles and n zeros formed between the drain output node and the ground node in the transistor when the output node of the harmonic frequency processing circuit is short-circuited to the ground node.