HARQ Combination Device DDR2 Switching Interference Cancellation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing technologies are unsupportive of the latest interference cancellation algorithm, leading to significant interference for high-rate User Equipment (UE) in HARQ combination, and are inefficient in data processing during large data transfers in DDR2, affecting the performance and efficiency of HARQ combination.
Innovation Solution
The method and device implement a latest interference cancellation algorithm that supports multiple demodulations, dynamically switch DDR2 to reduce storage and transfer inefficiencies, and allow flexible configuration of coefficients for HARQ combination, optimizing decoding success probability and DDR2 usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If existing HARQ combination technology is used, then basic retransmission functionality is maintained, but interference cancellation algorithm is not supported causing significant interference for high-rate UE
Solution Approach 1:
The patent implements dynamic switching between different demodulation modes (first demodulation, second demodulation, and re-demodulation) based on channel conditions and interference levels. This allows the system to adaptively select the most appropriate interference cancellation algorithm for high-rate UE, thereby improving decoding success probability while maintaining compatibility with existing HARQ combination technology.
2Productivity
If software-based HARQ combination is used, then implementation flexibility is maintained, but data processing efficiency is low during large data transfers in DDR2
Solution Approach 1:
The patent replaces software-based HARQ combination processing with hardware-based processing units that directly interface with DDR2 memory. This substitution of mechanical/software systems with hardware systems significantly improves data processing efficiency during large data transfers by eliminating software overhead and enabling direct memory access for HARQ combination operations.
3Measurement precision
If frequent reading/writing of DDR2 is performed, then HARQ combination accuracy is maintained, but storage space is wasted and reading/writing efficiency decreases
Solution Approach 1:
The patent implements selective reading and writing of DDR2 memory by identifying and processing only the specific memory locations that contain valid HARQ data requiring combination. Instead of uniformly reading/writing entire memory blocks, the system locally accesses only the necessary portions, thereby maintaining HARQ combination accuracy while reducing DDR2 read/write overhead and energy consumption.
Data Source
Figure 1
Figure 2
Figure 3
AI summary
A method for Hybrid Automatic Repeat Request (HARQ) combination is disclosed. The method includes that: externally configured parameters relevant to HARQ combination are received, and an identifier ddr2switch of DDR2 switching is calculated to acquire addresses involved before and after the HARQ combination; it is determined, according to the parameters and the addresses involved before and after the HARQ combination, whether the HARQ combination is needed to be performed; and when it is determined that the HARQ combination is needed to be performed, data in a DDR2 are read and stored into a first data cache random access memory RAMA; and a HARQ combination calculation is performed, and the calculation result is stored into a second data cache random access memory RAMB. A device for HARQ combination is further disclosed. The technical solutions provided in the disclosure are based on a latest interference cancellation algorithm, greatly increase the success probability of decoding, saves the storage space of a DDR2 and improves the reading/writing efficiency.