Harvardizer Segregating Instructions and Data for Malware Resistance

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Solution Overview

Problem

Von Neumann architecture-based microprocessors are vulnerable to self-modification by malicious intent or malware due to shared instruction and data memory spaces, leading to security vulnerabilities and the need for continuous software updates to address emerging threats.

Innovation Solution

Implementing a Harvard architecture with physically separate instruction and data memories, using a harvardizer to separate comingled instructions and data, and employing encryption to thwart tampering and reverse engineering, while enabling execution of legacy instruction sets through Transformation Execution Engines (TXEs).

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If Von Neumann architecture with shared instruction and data memory is used, then device complexity is reduced and ease of manufacture is improved, but security and reliability deteriorate due to vulnerability to malware and code injection attacks

Engineering Contradiction:
Improveease of manufactureVSAvoidsecurity
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent applies segmentation by dividing the memory architecture into separate instruction memory and data memory spaces. The harvardizer component segments the comingled instruction and data signals into distinct paths, physically isolating them to prevent malware from injecting code into instruction streams. This segmentation resolves the contradiction by maintaining manufacturing simplicity while eliminating the security vulnerability of shared memory spaces.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If software-based malware protection is implemented, then adaptability to security threats is improved, but reliability deteriorates because the protection system itself can be compromised by malware

Engineering Contradiction:
ImproveadaptabilityVSAvoidtamper resistance
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent introduces an intermediary hardware layer - the harvardizer - that sits between the malware and the instruction execution path. This hardware intermediary actively separates and isolates instruction signals from data signals, creating a protective barrier that prevents malware from compromising software-based protection mechanisms. The intermediary operates at the hardware level, ensuring that even if software protection is compromised, the fundamental instruction execution path remains secure.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If physically separate instruction and data memories are implemented, then security and tamper resistance are improved, but device complexity increases

Engineering Contradiction:
Improvetamper resistanceVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies universality by designing the harvardizer as a multi-functional component that handles multiple tasks: separating instruction and data signals, encrypting/decrypting data, and managing memory access. This single integrated component provides the security benefits of physically separate memories while avoiding the complexity of implementing complete separate memory subsystems. The harvardizer serves multiple security and processing functions simultaneously, reducing overall device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS9208353B2Malware and tamper resistant computer architecture
Publication Date: 2015.12.08 EVERFOX HOLDINGS LLC
  • US9208353B2 patent drawing
  • US9208353B2 patent drawing
  • US9208353B2 patent drawing

AI summary

Generally described herein are methods and systems for enhanced tamper and malware resistant computer architectures. A system for enhanced tamper and malware resistance can include a harvardizer configured to receive comingled instructions and data and produce separated instructions and data. A data memory can be configured to receive the separated data. An instruction memory that is physically separate from the data memory can be configured to receive the separated instructions. The system can include one or more computer processors that can be configured to execute the separated instructions and data. The system can include one or more encryptors or decryptors to help thwart injection based attacks.