Hash-Based Address Matching for Packet Switching

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Solution Overview

Problem

Current packet switching technologies face challenges in efficiently processing packets due to the increasing demand for speed and capacity in communications networks, particularly in performing accurate address matching operations.

Innovation Solution

The implementation of hash-based address matching methods, utilizing a lookup chip to determine processing information for packets by deriving a hash key from the packet header and using multiple hash tables with different memory configurations for efficient longest prefix matching and exact match operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If longest prefix matching is used for packet forwarding, then routing accuracy is improved, but processing time increases

Engineering Contradiction:
Improverouting accuracyVSAvoidprocessing time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent segments the routing table into multiple hash tables, each storing routing entries with different prefix lengths. This segmentation allows the system to perform parallel hash-based lookups for different prefix lengths simultaneously, reducing the sequential search time while maintaining routing accuracy through comprehensive coverage of all prefix lengths.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent replaces the traditional sequential mechanical search mechanism with a hash-based computational approach. By using hash functions to directly compute entry positions in hash tables, the system eliminates linear searching and achieves constant-time O(1) lookup complexity, dramatically reducing processing time while preserving routing precision.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Productivity

If hash-based address matching is implemented, then packet processing speed is improved, but device complexity increases

Engineering Contradiction:
Improvepacket processing speedVSAvoiddevice complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements a universal hash table structure that handles multiple routing scenarios (different prefix lengths, various packet types) through a single unified mechanism. The same hash function and table structure serve both exact match and longest prefix match operations, reducing overall system complexity despite the performance improvements gained.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent changes the fundamental parameter of address matching from sequential comparison to hash-based direct addressing. This parameter change transforms the time complexity from O(n) to O(1) while the added complexity of hash function computation is minimal compared to the gain in processing speed, making the device more efficient overall.

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If multiple hash tables with different memory configurations are used, then search accuracy is improved, but memory access time increases

Engineering Contradiction:
Improvesearch accuracyVSAvoidmemory access time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent performs preliminary organization of routing entries into multiple hash tables during system initialization, with each table pre-configured for specific prefix length ranges. This preliminary action ensures that during packet forwarding, the system can directly access the appropriate pre-configured table without dynamic configuration overhead, maintaining both accuracy and speed.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent adds a dimensional organization to the hash tables by creating separate tables for different prefix length dimensions. This multi-dimensional structure allows the system to search across multiple dimensions simultaneously through parallel hash computations, improving search accuracy while the direct hash indexing keeps memory access time constant rather than increasing with the number of dimensions.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS10389633B2Hash-based address matching
Publication Date: 2019.08.20 CISCO TECHNOLOGY INC
  • US10389633B2 patent drawing
  • US10389633B2 patent drawing
  • US10389633B2 patent drawing

AI summary

In one embodiment, processing is performed based on the result of a lookup operation that determines a matching hash bucket entry, with each of the entries of the hash table spanning at least two memories. A first portion of the matching hash bucket entry is retrieved from a first random access memory from a first hash bucket stored at a first location identified based on a first particular hash function applied to a hash key. First current information of the hash key is determined to match the first portion. A second portion of the matching hash bucket entry is retrieved from a second random access memory from a second hash bucket stored at a second location identified based on a second particular hash function applied to the hash key. Second current information of the hash key is determined to match the second portion.