Hash Compression Accelerator With In-Order Parallel Match Handling
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Hash-based compression in software performs worse than dedicated hardware, necessitating methods to accelerate hash-based compression in dedicated hardware apparatuses to improve performance.
Innovation Solution
A compression accelerator method involving an intermediary buffer and a Finite-State Machine (FSM) that fetches and processes strings, issues hash requests, and updates states and match lengths to enable efficient compression, allowing multiple hash requests to be processed in parallel and outputting results in the original order.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If hash-based compression is implemented in software, then flexibility and ease of implementation are improved, but processing speed and performance deteriorate
Solution Approach 1:
The patent replaces software-based hash computation and string matching with dedicated hardware circuits including hash matchers, LSM (Longest String Matcher), and compression engines. This hardware substitution maintains the algorithmic flexibility of software while achieving significant performance acceleration through parallel processing and specialized circuit design.
2Productivity
If multiple hash requests are processed in parallel in hardware, then processing speed is improved, but maintaining original order of results becomes more complex
Solution Approach 1:
The patent assigns unique sequence numbers to each hash request before parallel processing begins. These sequence numbers are recorded in buffers alongside the compression data. After parallel processing completes, results are reordered using these pre-assigned sequence numbers, ensuring original order is restored without complex synchronization during the critical parallel processing phase.
Solution Approach 2:
The patent introduces intermediate buffers that store compression data, match lengths, and sequence numbers during parallel processing. These buffers act as mediators between the parallel hash matchers/LSM units and the final compression output, allowing out-of-order completion while maintaining in-order output through sequence number-based reordering.
3Productivity
If dedicated hardware is used for compression, then processing speed is improved, but device complexity increases
Solution Approach 1:
The patent divides the compression hardware into distinct functional modules: hash matchers for hash-based matching, LSM (Longest String Matcher) for LZ77-style matching, compression engines for generating compressed output, and buffer management units. This segmentation allows each module to be optimized independently while working together in a coordinated pipeline, managing overall system complexity.
Solution Approach 2:
The patent designs the hardware compression apparatus to support multiple compression algorithms (hash-based compression, LZ77-style compression) and can be configured for different compression modes. The same hardware infrastructure handles various compression tasks, reducing overall device complexity compared to having separate dedicated hardware for each algorithm.
Data Source
AI summary
The invention introduces a method for accelerating hash-based compression, performed in a compression accelerator, comprising: fetching a string to be compressed from a data buffer; storing instances corresponding to the string in an intermediary buffer; issuing a hash request to a hash matcher for each instance, issuing a data request to an LSM (longest string matcher) according to a first reply sent by the hash matcher, and updating a state, a match length and a match offset of the instance according to a second reply sent by the LSM; and outputting the result to a formatter according to the state, the match length and the match offset of each instance in the original order of the associated substrings that appeared in the string.


