Hash-Based L2P Table Compression for DRAM Optimization
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Solution Overview
Problem
Flash-based data storage devices face challenges in implementing higher-capacity storage due to the constrained size of the random-access memory (RAM) that limits the maximum size of the logical-to-physical (L2P) table, leading to inefficiencies in address translation and memory usage.
Innovation Solution
A data storage device controller applies a hash function to logical addresses to derive a first portion of the physical address, allowing the L2P table to store only complementary second portions, optimizing DRAM usage and enabling aligned accesses, thereby reducing the size of physical-address entries and ECC overhead.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the L2P table stores complete physical addresses, then address translation is accurate, but DRAM capacity is excessive and cost increases
Solution Approach 1:
The physical address is divided into two parts: a first portion derived from hashing the logical address, and a second portion stored in the L2P table. This segmentation allows the L2P table to store only the necessary complementary bits, reducing DRAM capacity requirements while maintaining accurate address translation.
Solution Approach 2:
The hash function extracts the first portion of the physical address from the logical address, removing redundant information that would otherwise need to be stored in the L2P table. This extraction reduces the storage burden on DRAM while preserving the ability to accurately translate addresses.
2Quantity of substance
If the L2P table entries are made shorter, then DRAM capacity is optimized, but address alignment may be compromised
Solution Approach 1:
Different portions of the physical address are handled with different qualities: the first portion is computed on-demand for each access, while the second portion is pre-stored with optimized alignment. This local differentiation allows shorter L2P table entries while maintaining necessary address alignment for efficient DRAM access.
3Quantity of substance
If a hash function is applied to logical addresses, then L2P table size is reduced, but computational complexity increases
Solution Approach 1:
The mechanical system of storing complete addresses in the L2P table is replaced with a computational approach using hash functions. This substitution reduces storage requirements by computing only the necessary address portions on-demand, trading some computational complexity for reduced hardware resources.
Data Source
AI summary
A data storage device whose controller is configured to apply a hash function to a logical address specified in a received host request to obtain a first portion of the corresponding physical address (e.g., the channel number or channel and die numbers). This feature of the controller enables the L2P table stored in the DRAM associated with the controller to have physical-address entries that contain therein only complementary second portions of the physical addresses, but not the first portions. Such shorter physical-address entries in the L2P table enable a corresponding beneficial reduction in the size of the DRAM and can further be leveraged to have optimized and aligned access to the L2P table in the DRAM.


