Hash-Based Time Slot MAC Synchronization in Multi-Slot Switches

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Solution Overview

Problem

In large-scale Ethernet switch architectures, conventional hardware-based MAC address synchronization methods lead to scalability issues and packet drops due to excessive hardware bandwidth usage, particularly in multi-chassis configurations with link aggregation topologies.

Innovation Solution

A hash-based time slot approach is implemented for synchronizing MAC addresses between line cards, distributing the synchronization process over time using parameters like hardware logical port identification, virtual local area network identification, destination MAC address, and source MAC address, and utilizing XOR operations to determine time slots for data packet transmission, thereby reducing the load on hardware resources.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If hardware-based periodic MAC address synchronization is implemented in multi-chassis Ethernet switches, then MAC address consistency across line cards is improved, but hardware bandwidth consumption increases excessively causing packet drops

Engineering Contradiction:
ImproveMAC address consistencyVSAvoidhardware bandwidth consumption
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent implements periodic MAC address synchronization where line cards exchange MAC address information at predetermined time intervals. This periodic action ensures MAC address consistency across the multi-chassis switch while controlling hardware bandwidth consumption by limiting synchronization to specific time slots rather than continuous operation.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent segments the MAC address synchronization process by dividing it into separate time slots and distributing the synchronization load across multiple line cards. Each line card handles synchronization for specific MAC addresses in designated time slots, preventing any single hardware resource from being overwhelmed and reducing peak bandwidth consumption.

Inventive Principle:
Principle #1Segmentation

2Measurement precision

If frequent MAC address synchronization is performed to maintain consistency, then MAC address accuracy is improved, but packet traffic performance deteriorates due to hardware bandwidth exhaustion

Engineering Contradiction:
ImproveMAC address accuracyVSAvoidpacket traffic throughput
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The system performs MAC address synchronization at periodic intervals rather than continuously or on-demand. This periodic synchronization maintains adequate MAC address accuracy for normal operation while preventing hardware bandwidth exhaustion that would occur with more frequent synchronization, thus preserving packet traffic throughput.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent implements partial synchronization by selecting only certain MAC addresses for synchronization in each time slot rather than synchronizing all MAC addresses simultaneously. This partial action approach maintains sufficient MAC address accuracy for packet forwarding while reducing the overall synchronization load on hardware resources.

Inventive Principle:
Principle #16Partial or excessive action

3Stability of the object's composition

If MAC address updates are synchronized across all line cards simultaneously, then consistency is improved, but hardware switching capacity is exceeded causing packet drops

Engineering Contradiction:
ImproveMAC address table consistencyVSAvoidpacket delivery reliability
Core Design Contradiction:
Stability of the object's compositionVSReliability

Solution Approach 1:

The patent segments the MAC address update synchronization across different time slots and line cards. Instead of all line cards updating simultaneously, each line card updates its MAC address table in designated time slots. This segmentation maintains MAC address consistency across the system while preventing any single moment from exceeding hardware switching capacity, thereby avoiding packet drops.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system uses periodic time slots for MAC address updates, where line cards sequentially perform updates in predetermined intervals. This periodic approach ensures that MAC address tables remain consistent across line cards over time while distributing the update load to prevent any single update event from overwhelming the hardware switching capacity.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS9098434B2Load balancing systems and methods of MAC learning in multi-slot architectures
Publication Date: 2015.08.04 CIENA CORP
  • US9098434B2 patent drawing
  • US9098434B2 patent drawing
  • US9098434B2 patent drawing

AI summary

Line cards in a multi-slot network element utilize load balancing systems and methods for synchronizing learned Media Access Control (MAC) addresses therebetween. It is an objective of the load balancing systems and methods to enable high data rate scalability between line cards in a distributed system while preventing adverse effects on packet traffic. The load balancing systems and methods include inter alia MAC address updates between data path devices (e.g., network processors, application specific integrated circuits, etc.) using data frames and a hash-based time slot strategy ensuring MAC address updates are distributed over time as opposed to large scale, singular events.