Hashing Engine Circuitry for SPHINCS+ Digital Signatures
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Stateless hash-based signature operations, such as those according to the SPHINCS+ standard, face significant computation latency issues due to the need for numerous hash executions, which hinders their deployment in practical applications.
Innovation Solution
An optimized hardware engine with hashing circuitry is introduced, utilizing precomputed intermediate states for the SHA256 public key seed to reduce repetition and latency, and enabling parallelization of WOTS-Chain functions and tree traversal for Forest Of Random Subsets (FORS) functions, thereby accelerating key-generation, sign, and verify operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If numerous hash executions are performed for stateless hash-based signature operations, then security and correctness are ensured, but computation latency increases significantly
Solution Approach 1:
The patent precomputes intermediate states for the SHA256 public key seed and stores them in a lookup table. During signature operations, these precomputed values are retrieved and used directly, eliminating the need to recompute them repeatedly. This preliminary computation and storage of intermediate states significantly reduces the computation latency while maintaining the security requirements of the SPHINCS+ standard.
2Ease of manufacture
If WOTS-Chain functions and tree traversal for FORS functions are executed sequentially, then implementation simplicity is maintained, but processing speed is reduced
Solution Approach 1:
The patent divides the signature operation into multiple independent parallel processing paths. Specifically, it separates the WOTS-Chain function computations from the FORS tree traversal operations, and further segments them into multiple parallel instances that can execute simultaneously. This segmentation allows the system to maintain implementation simplicity while achieving significant speedup through parallel execution of these segmented computational tasks.
Data Source
AI summary
Techniques for implementing a hardware engine for stateless hash-based signatures according to a SPHINCS+standard with encryption according to a SHA256 encryption standard are described. In certain examples, a system includes a processor core; and an accelerator coupled to the processor core, the accelerator comprising: one or more hash engine circuits, a coupling to allow for communication between the one or more hash engine circuits and a memory, and hash control circuitry to, for a request to perform a stateless hash-based signature operation on an input, cause performance of a one-time signature scheme function and a forest of random subsets function by the one or more hash engine circuits to generate a resultant.


