3D HBM Optical Chiplet Stacking for Thermal and Space Constraints
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Solution Overview
Problem
High performance computing requires additional high bandwidth memory (HBM) dies, but integration is limited by space, power, and thermal constraints, necessitating innovative solutions for increased memory bandwidth and capacity.
Innovation Solution
The 3D-stacking of HBM dies with an optical interface and a cooling die, where the optical chiplet connects the HBM optics module package to other components via optical fibers, allowing for efficient thermal management and increased connectivity without performance degradation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If additional HBM dies are integrated in a package to increase bandwidth and capacity, then memory bandwidth and capacity improve, but space constraints, power constraints, and thermal constraints worsen
Solution Approach 1:
The patent transitions from 2D planar integration to 3D vertical stacking of HBM dies. Multiple HBM dies are stacked in the vertical dimension and interconnected through through-silicon vias (TSVs), enabling increased memory bandwidth and capacity without proportionally increasing the package footprint. This dimensional change allows the system to overcome space constraints while maintaining high productivity.
2Productivity
If additional HBM dies are integrated in a package to increase bandwidth and capacity, then memory bandwidth and capacity improve, but power constraints worsen
Solution Approach 1:
By stacking HBM dies vertically and using TSVs for interconnection, the patent reduces the need for extensive lateral routing. This shortens signal paths and reduces capacitive loading, thereby lowering power consumption for a given bandwidth compared to traditional 2D arrangements. The 3D architecture enables higher bandwidth per watt.
3Productivity
If additional HBM dies are integrated in a package to increase bandwidth and capacity, then memory bandwidth and capacity improve, but thermal constraints worsen
Solution Approach 1:
The patent introduces an intermediary cooling structure between the HBM die stack and the package substrate. This cooling intermediary, which may include heat spreaders, heat sinks, or liquid cooling channels, acts as a thermal mediator that captures and dissipates heat generated by the high-density HBM stack, preventing thermal accumulation and maintaining reliable operation at high bandwidth.
Solution Approach 2:
The vertical stacking architecture concentrates heat generation in a compact vertical volume, enabling more efficient thermal management through directed heat paths to cooling structures. The 3D arrangement allows thermal management components to be positioned optimally in the vertical dimension, improving heat dissipation efficiency compared to distributed 2D layouts.
4Temperature
If HBM dies are positioned further from ASICs, then thermal management improves and space constraints are relaxed, but connectivity performance may degrade
Solution Approach 1:
The patent replaces traditional electrical interconnects with optical interconnects for connecting HBM dies to ASICs. Optical connections using light instead of electrical signals enable longer transmission distances without significant signal degradation, allowing HBM dies to be positioned further from ASICs while maintaining high connectivity speed. This substitution also reduces electromagnetic interference and power consumption.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables high bandwidth and power while maintaining thermal control, allowing for compact, high-performance computing by positioning HBM dies further from ASICs with minimal performance loss and efficient heat management.
Implementation Method 1
a cooling die located between the one or more HBM dies and the optical chiplet, wherein the cooling die contains an inlet for a cooling material, an outlet for a cooling material, one or more channels configured to transport the cooling material
Implementation Method 2
one or more channels configured to transport the cooling material between the vias within the region
Data Source
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AI summary
The technology generally relates to high bandwidth memory (HBM) and optical connectivity stacking. Disclosed systems and methods herein allow for 3D-stacking of HBM dies (104a-g) that are interconnected with an optical interface in a manner that allows for compact, high performance computing. An optical chiplet (120) can be configured to be placed onto a stack of HBM dies (104a-g), with a cooling die (110) that is positioned between the HBM dies (104a-g) and the optical chiplet (120). The optical chiplet (120) may be configured to connect the HBM optics module package to one or more other components of the package via to one or more optical fibers (140).