HBM Package Structure With Direct Bonding and Backside TSVs

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Solution Overview

Problem

Existing High Bandwidth Memory (HBM) structures face limitations in bandwidth due to communication between DRAM dies and logic dies, primarily through micro-bumps, which are not satisfactory for achieving optimal performance.

Innovation Solution

A high bandwidth memory structure is designed with a first and second bonding layer on the top metal layers of the logic and memory wafers, respectively, featuring aligned contact features for direct bonding, and includes a backside through-substrate via (BTSV) coupled to a frontside through-substrate via (FTSV) for vertical communication, enhancing bandwidth by 10 to 100 times.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If micro-bumps are used for communication between DRAM dies and logic dies, then the existing HBM structure can be implemented, but the bandwidth is limited and not optimal

Engineering Contradiction:
ImprovebandwidthVSAvoidcommunication structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent transitions from lateral micro-bump connections to vertical through-substrate via connections, changing the dimensional approach of inter-die communication. The BTSV extends through the entire substrate thickness, enabling direct vertical communication paths that increase bandwidth by 10 to 100 times compared to traditional micro-bump structures.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent merges the bonding layer functionality with the interconnect structure by integrating contact features directly into the bonding layers. This consolidation eliminates separate connection components and achieves both mechanical bonding and electrical connection through the same structure, simplifying the overall device complexity while enhancing bandwidth.

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If through-substrate vias are used to extend communication paths, then bandwidth is enhanced by 10 to 100 times, but the manufacturing complexity increases

Engineering Contradiction:
ImprovebandwidthVSAvoidfabrication process
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent performs preliminary actions by forming the through-substrate via structure and bonding layers during the wafer fabrication process before final assembly. The contact features are pre-aligned and prepared in the bonding layers, enabling subsequent direct bonding without requiring complex post-fabrication alignment procedures, thus managing manufacturing complexity while achieving high bandwidth.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If direct bonding with aligned contact features is implemented, then vertical wafer-to-wafer communication is achieved with high bandwidth, but the manufacturing precision requirements increase

Engineering Contradiction:
Improvecommunication efficiencyVSAvoidcontact feature alignment
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The bonding layers serve multiple functions: they provide mechanical bonding between wafers, establish electrical connections through aligned contact features, and enable vertical communication paths. This multi-functionality reduces the need for separate alignment and bonding procedures, managing manufacturing precision requirements while achieving high communication efficiency.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20260033309A1High bandwidth package structure
Publication Date: 2026.01.29 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20260033309A1 patent drawing
  • US20260033309A1 patent drawing
  • US20260033309A1 patent drawing

AI summary

A method according to the present disclosure includes providing a first workpiece that includes a first substrate and a first interconnect structure, providing a second workpiece that includes a second substrate, a second interconnect structure, and a through via extending through a portion of the second substrate and a portion of the second interconnect structure, forming a first bonding layer on the first interconnect structure, forming a second bonding layer on the second interconnect structure, bonding the second workpiece to the first workpiece by directly bonding the second bonding layer to the first bonding layer, thinning the second substrate, forming a protective film over the thinned second substrate, forming a backside via opening through the protective film and the thinned second substrate to expose the through via, and forming a backside through via in the backside via opening to physically couple to the through via.