HBM Stack Layout for Heat Dissipation and Lower Bonding TAT
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Solution Overview
Problem
The challenge in manufacturing high bandwidth memory (HBM) is the increased height and potential for stack voids, warpage, and heat accumulation due to stacking multiple memory dies, which degrades performance and increases turnaround time (TAT) and deteriorates heat dissipation characteristics.
Innovation Solution
The HBM is manufactured by stacking semiconductor dies including two or more memory dies on a base die, with integrated buffer and core dies, and alternating inter-connection structures, utilizing silicon material for improved heat dissipation and reducing TAT through efficient die bonding processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of memory dies in a memory stack is increased, then the storage capacity and data transmission rate are improved, but the height of the memory stack becomes higher than desired and stack voids occur at the interfaces between memory dies
Solution Approach 1:
The patent transitions from a single vertical stack configuration to a three-dimensional arrangement with multiple memory stacks disposed on a base die. This dimensional change allows increasing storage capacity by adding stacks in the horizontal plane rather than increasing the height of a single stack, thereby avoiding stack voids while maintaining high capacity.
2Quantity of substance
If the number of memory dies in a memory stack is increased, then the storage capacity is improved, but warpage occurs in the memory stack
Solution Approach 1:
By distributing memory dies across multiple stacks in a horizontal arrangement rather than stacking them vertically to excessive heights, the patent reduces thermal and mechanical stress concentration. This dimensional redistribution prevents warpage while achieving high storage capacity through multiple parallel stacks.
3Quantity of substance
If the number of memory dies in a memory stack is increased, then the storage capacity is improved, but heat accumulates inside the memory stack
Solution Approach 1:
The patent arranges multiple memory stacks horizontally on the base die, increasing the surface area for heat dissipation. This spatial distribution allows heat to be dispersed across a larger area rather than concentrated in a single tall stack, improving thermal management while maintaining high storage capacity.
4Quantity of substance
If a plurality of memory stacks is disposed on one base die to increase the number of memory dies, then the storage capacity is improved, but the turnaround time increases due to repeatedly performing memory die bonding process
Solution Approach 1:
The patent integrates multiple memory dies within each semiconductor die and stacks these composite dies on the base die. This merging approach reduces the total number of bonding operations required compared to stacking individual memory dies separately, thereby decreasing turnaround time while achieving high storage capacity through the multi-die-per- semiconductor-die configuration.
5Quantity of substance
If a plurality of memory stacks is disposed on one base die, then the storage capacity is improved, but the heat dissipation characteristic deteriorates due to molding material positioned in the center region between the plurality of memory stacks
Solution Approach 1:
The patent strategically positions semiconductor dies with superior heat dissipation properties in the central region between multiple memory stacks. This local quality enhancement ensures that the most thermally conductive materials are placed where heat accumulation is most critical, improving overall heat dissipation while maintaining high storage capacity through the multi-stack configuration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances heat dissipation characteristics and reduces TAT, resulting in a high-capacity HBM with improved productivity and reduced power consumption compared to conventional methods.
Implementation Method 1
utilizing silicon material for improved heat dissipation
Data Source
AI summary
A high bandwidth memory according to an example embodiment may include a base die, and a semiconductor stack on the base die. The semiconductor stack may include a plurality of semiconductor dies, which may be stacked in a vertical direction. Each of the plurality of semiconductor dies may include a plurality of memory dies arranged in a horizontal direction.