HBM3 Read-Data Strobe Offset Calibration With Pad Voltage Conditioning

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Solution Overview

Problem

Existing offset calibration techniques for High Bandwidth Memory 3 (HBM3) struggle to effectively reduce signal attenuation, which compromises signal integrity and hampers seamless high-speed data transmission.

Innovation Solution

A method involving a pad voltage divider and a receiver read-data strobe replica is employed to calibrate differential pad voltages to a common voltage reference, using a receiver read-data strobe replica as a comparator and enabling dual calibration of drive control signals to minimize signal attenuation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional offset calibration techniques are used, then the calibration process can be completed, but signal attenuation cannot be effectively reduced

Engineering Contradiction:
Improvesignal integrityVSAvoidsignal attenuation
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The pad voltage divider is configured to condition pad voltages before the actual offset calibration process, pre-establishing optimal voltage levels to minimize signal attenuation during high-speed data transmission

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

A pad voltage divider is introduced as an intermediary component between the pad and the receiver, specifically designed to condition pad voltages and reduce signal attenuation without interfering with the normal calibration operations

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If higher operational speeds are achieved, then data transmission performance is improved, but signal attenuation increases

Engineering Contradiction:
Improveoperational speedVSAvoidsignal attenuation
Core Design Contradiction:
SpeedVSLoss of energy

Solution Approach 1:

Pad voltages are conditioned in advance through the voltage divider before high-speed transmission begins, establishing optimal voltage levels that maintain signal integrity at higher operational speeds

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The pad voltage divider dynamically adjusts and conditions pad voltage parameters to optimal levels, enabling the system to operate at higher speeds while compensating for increased signal attenuation through precise voltage control

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12469541B2Offset calibration method and apparatus for high bandwidth memory 3 (HBM3)
Publication Date: 2025.11.11 SKYECHIP BERHAD
  • US12469541B2 patent drawing
  • US12469541B2 patent drawing
  • US12469541B2 patent drawing

AI summary

The present invention discloses a computer-implemented method for offset calibration and an integrated circuit (IC) memory controller for offset calibration. Said method comprises the step of: performing offset calibration of a receiver read-data strobe replica; conditioning pad voltages of a receiver read-data strobe and the receiver read-data strobe replica based on an offset calibration value of the receiver read-data strobe replica; and performing offset calibration of the receiver read-data strobe based on an offset calibration value of the pad voltages; wherein disabling differential inputs of transmission gate from a differential strobe signal pins to the receiver read-data strobe replica during receiver read-data strobe replica offset calibration.