Two-Terminal HBT Access Structure for Fast Switching Memory
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
There is a need for improved structures and methods for forming structures that include a switching memory element, particularly in the context of resistive random-access memory devices, to enhance performance and reliability.
Innovation Solution
The proposed solution involves a structure comprising a switching memory element and a two-terminal access device with a semiconductor layer that is electrically floating. This configuration includes a first terminal coupled to the switching memory element, a second terminal, and a semiconductor layer between the first and second terminals, facilitating efficient programming and sensing of the memory element.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a conventional three-terminal access device is used to control the switching memory element, then the device structure is well-established and manufacturable, but the on-current is limited and switching speed is slower
Solution Approach 1:
The patent extracts and removes the base terminal from the conventional three-terminal bipolar transistor structure, transforming it into a two-terminal access device. This extraction eliminates the base region and its associated control terminal, directly connecting the emitter to the collector through a simplified structure that enables faster switching and higher on-current while maintaining manufacturability through existing fabrication processes
Solution Approach 2:
The patent segments the semiconductor layer into distinct functional regions (emitter region, collector region, and intermediate regions) within the two-terminal structure. This segmentation allows each region to be optimized for specific functions while maintaining the overall simplified two-terminal architecture, achieving both high performance and structural clarity
2Reliability
If a two-terminal access device with electrically floating semiconductor layer is used, then large on-currents and fast switching are achieved, but the electrical floating condition requires precise fabrication control
Solution Approach 1:
The patent employs self-aligned fabrication processes where the electrically floating semiconductor layer is automatically positioned and configured through the fabrication sequence itself. The layer forms in-situ between the emitter and collector regions through controlled deposition and processing steps, eliminating the need for separate alignment operations and reducing manufacturing precision requirements while ensuring consistent electrical floating conditions
Solution Approach 2:
The patent performs preliminary formation of the electrically floating semiconductor layer during early fabrication stages, before subsequent processing steps. The layer is pre-configured with appropriate thickness, composition, and positioning through controlled deposition, ensuring that later processing steps automatically maintain the electrical floating condition without requiring additional precision control
Data Source
AI summary
Structures that include a switching memory element and methods of forming a structure including a switching memory element. The structure comprises a switching memory element, and a two-terminal access device including a first terminal coupled to the switching memory element, a second terminal, and a semiconductor layer between the first terminal and the second terminal. The semiconductor layer is electrically floating in the structure.