Heterojunction Bipolar Transistor Base Window Trench Design

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Solution Overview

Problem

Heterojunction bipolar transistors (HBTs) face limitations in achieving high maximum oscillation frequency due to increased base-collector capacitance and base resistance, which are exacerbated by the overlap between the base and active windows, leading to noise and performance issues in high-frequency applications.

Innovation Solution

A method of manufacturing HBTs involving the formation of a base window with a vertical trench and an epitaxial seed liner, where the grain boundary is angled towards the side walls, allowing for reduced spacer width and lower base resistance without emitter-base junction leakage, achieved by depositing a dielectric and polysilicon layer, forming a trench, and growing an epitaxial base material.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If the base and active windows are overlapped to simplify manufacturing, then manufacturing complexity is reduced, but base-collector capacitance increases leading to lower maximum oscillation frequency

Engineering Contradiction:
Improvemanufacturing complexityVSAvoidmaximum oscillation frequency
Core Design Contradiction:
Device complexityVSSpeed

Solution Approach 1:

The base window is segmented into two distinct regions: a first base region over the active region and a second base region over the shallow trench insulation regions. This segmentation allows the grain boundary to be positioned at the interface between these regions, angling it away from the emitter outdiffusion region while maintaining manufacturing simplicity through a unified formation process.

Inventive Principle:
Principle #1Segmentation

2Reliability

If spacer width is reduced to lower base resistance, then base resistance decreases improving performance, but emitter-base junction leakage increases

Engineering Contradiction:
Improvebase resistanceVSAvoidemitter-base junction leakage
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The grain boundary is oriented at an angle relative to the vertical axis, creating a three-dimensional configuration where the boundary angles away from the emitter outdiffusion region. This angular orientation allows spacers to be positioned closer to the emitter without causing leakage, as the angled boundary provides a natural separation that prevents direct contact between the spacer and emitter region.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Reliability

If additional processing steps are added to improve CMOS performance parameters, then breakdown voltage and noise performance improve, but manufacturing cost increases

Engineering Contradiction:
Improvebreakdown voltageVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The base window formation process serves multiple functions simultaneously: it defines the base region geometry, creates the vertical trench structure, positions the grain boundary, and prepares the structure for subsequent epitaxial growth. This multi-functionality eliminates the need for separate processing steps that would otherwise be required to achieve each of these outcomes individually.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in lower base resistance, noise figure, and higher maximum oscillation frequency, enhancing RF and analog performance while maintaining cost-effectiveness by reusing masks and reducing manufacturing time.

Implementation Method 1

growing an epitaxial base material over the resultant structure

Methodology Applied
Scientific EffectEpitaxy: Epitaxy

Data Source

PatentEP2418681B1Heterojunction Bipolar Transistor and Manufacturing Method
Publication Date: 2017.10.11 NXP BV
  • EP2418681B1 patent drawingFigure 1~2
  • EP2418681B1 patent drawingFigure 3~4
  • EP2418681B1 patent drawingFigure 5~6

AI summary

Disclosed is a method of manufacturing a heterojunction bipolar transistor (HBT), comprising providing a substrate (10) comprising an active region (14) bordered by shallow trench insulation regions (12); depositing a stack of a dielectric layer (20) and a polysilicon layer (18) over the substrate; forming a base window (16) in said stack, said base window extending over the active region and part of the shallow trench insulation regions, said base window comprising a trench extending vertically between the active region and one of said shallow trench insulation regions; growing an epitaxial base material (16', 16") inside the base window; forming a spacer (22) on the exposed side walls of the base material; and filling the base window with an emitter material (24). A HBT manufactured in this manner and an IC including such a HBT are also disclosed.