HBT Bump Opening Offset Prevents Solder Penetration
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Solution Overview
Problem
In semiconductor devices using heterojunction bipolar transistors (HBTs), the existing flip-chip bonding method can cause damage to HBTs due to solder penetration through cracks in the under-bump metal layer, leading to diffusion and reaction with emitter wiring, resulting in transistor destruction and performance degradation.
Innovation Solution
The semiconductor device design features a bump structure with a second opening in the protective film that is positioned outside the first opening in plan view, preventing solder from reaching the emitter layer and reducing the risk of transistor damage, while maintaining efficient heat dissipation through the first opening.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the first and second openings partially overlap in plan view to simplify the structure, then the device complexity is reduced, but solder can penetrate through cracks and reach the emitter layer causing transistor damage
Solution Approach 1:
The patent divides the opening structure into two separate openings: a first opening in the insulating film for emitter wiring connection, and a second opening in the protective film for bump connection. By segmenting the openings and positioning them non-overlapping in plan view, the patent prevents solder penetration paths while maintaining structural functionality.
Solution Approach 2:
The patent introduces an intermediary protective film between the emitter wiring and the bump, with the second opening positioned outside the first opening. This intermediary structure acts as a barrier that prevents solder from reaching the emitter layer even when cracks occur in the under-bump metal layer.
2Temperature
If the bump is positioned directly over the first opening to maximize heat dissipation efficiency, then heat dissipation performance is improved, but the risk of solder reaching the emitter through cracks increases
Solution Approach 1:
The patent resolves the contradiction by transitioning from a vertical alignment (bump directly over first opening) to a horizontal separation arrangement. The second opening is positioned outside the first opening in plan view, creating a lateral offset that blocks solder penetration paths while preserving heat dissipation functionality through the bump structure.
Solution Approach 2:
The patent applies local quality by creating different functional zones: the first opening area maintains direct heat dissipation path, while the second opening area provides solder protection. The non-overlapping positioning creates distinct functional regions that simultaneously achieve heat dissipation and solder prevention.
3Ease of manufacture
If the under-bump metal layer is made thinner to reduce manufacturing complexity, then ease of manufacture is improved, but cracks are more likely to form and propagate
Solution Approach 1:
The patent implements preliminary action by pre-positioning the second opening outside the first opening before any soldering or bonding processes occur. This pre-configured spatial arrangement ensures that even if cracks form in the under-bump metal layer during subsequent manufacturing or operation, the solder cannot reach the emitter layer through the protected pathway.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces the risk of transistor damage and degradation by preventing solder penetration, thereby enhancing the reliability and performance of power transistors, particularly those operating with high power.
Implementation Method 1
The bump provides a pathway for heat dissipation, through which the heat generated by the HBTs escapes to the module substrate
Data Source
AI summary
A semiconductor device has bipolar transistors on a substrate. There is also an insulating film on the substrate, covering the bipolar transistors. On this insulating film is emitter wiring, sticking through openings in the insulating film (first openings) to be electrically coupled to the emitter layer of the bipolar transistors. On the emitter wiring is a protective film. On the protective film is a bump, sticking through an opening in the protective film (second opening) to be electrically coupled to the emitter wiring. In plan view, the second opening is included in the area that is inside the bump and outside the first openings.