Hot Carrier Injection Programming for Non-Volatile Memory
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Solution Overview
Problem
Conventional Hot Carrier Injection (HCI) programming for Non-Volatile Memory (NVM) cells is inefficient due to high programming current and complex circuitry requirements, leading to challenges in achieving uniform threshold voltage shifts and scalable parallel programming.
Innovation Solution
The method involves applying the main voltage supply Vcc to the drain electrode of NVM cells, reducing the current path through high voltage circuitry and using simpler logic circuitry for bitline switching, allowing for lower programming current and improved uniformity, enabling faster and more efficient parallel programming.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional HCI programming applies high voltage to drain electrode and control gate electrode, then programming speed is improved, but programming current becomes excessively large
Solution Approach 1:
The patent divides the programming operation into two distinct phases: a pre-programming phase that prepares the device by creating specific charge distributions, and a main programming phase that applies the threshold voltage shift. This segmentation allows the high current to be confined to a brief preparatory step rather than sustained during the actual programming, thereby improving programming speed while reducing overall current consumption.
Solution Approach 2:
The patent employs periodic voltage pulses with specific timing and amplitude characteristics. The drain electrode receives periodic voltage applications that are synchronized with control gate voltage pulses, creating a time-dependent charge injection mechanism. This periodic action enables efficient threshold voltage modification over time without requiring continuously high current, thus resolving the contradiction between programming speed and current magnitude.
2Manufacturing precision
If conventional HCI programming uses high voltage supply, then desired threshold voltage shift is achieved, but circuitry complexity increases
Solution Approach 1:
The patent makes the main voltage supply Vcc serve multiple functions: it provides the primary operating voltage for the memory device during normal operation and simultaneously serves as the high voltage supply for the HCI programming operation. This eliminates the need for separate high voltage generation circuitry, reducing device complexity while maintaining the ability to achieve uniform threshold voltage shifts through coordinated voltage applications to the drain and control gate electrodes.
Solution Approach 2:
The programming circuitry utilizes the existing voltage supply infrastructure of the memory device itself. The main voltage supply Vcc, already present for normal operation, is repurposed to provide the high voltage needed for programming. The device's own operational voltages are leveraged to perform the programming function, eliminating the need for external or dedicated high voltage generation circuits and thereby simplifying the overall device architecture.
3Productivity
If conventional HCI programming uses separate high voltage supply, then programming efficiency is maintained, but power consumption increases
Solution Approach 1:
The main voltage supply Vcc performs dual roles as both the operational supply voltage and the programming voltage source. By eliminating the need for separate high voltage supply circuitry, the patent reduces the overall power consumption of the system while maintaining programming efficiency. The same voltage source that powers normal device operation is utilized for programming, avoiding the additional power overhead of dedicated high voltage generation.
Solution Approach 2:
The memory device uses its own operational voltage supply to perform programming operations, rather than requiring external high voltage sources. This self-service approach reduces the total power budget required for the device, as the programming function is achieved through coordinated voltage applications from the existing supply rather than through additional power-hungry voltage multiplication or conversion circuits.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces programming current, simplifies bitline design, and enables efficient parallel programming of more NVM cells with improved uniformity, achieving faster and more reliable threshold voltage shifts with reduced power consumption.
Implementation Method 1
Hot Carrier Injection (HCI) is the fastest programming method to obtain the desired threshold voltage shift associated with MOSFET 10 in an NVM cell
Implementation Method 2
A high lateral electric field is created in the depletion region 16 between the pinch-off point 19 and the drain electrode 14. As the charge carriers current Is at the source side passes through the pinch-off point 19, the charges, now forming current Id at the drain side are strongly accelerated toward the drain 14 in the high field of the drain-depletion region
Implementation Method 3
Fowler-Nordheim (FN) tunneling are the two most commonly used programming mechanisms for NVM devices. FN tunneling uses little programming current but requires a longer programming time to achieve the desired threshold voltage shift
Data Source
AI summary
A method programs a memory cell by controlling a reverse bias voltage across the PN junction between a source electrode of a MOSFET in the memory cell and the substrate, and pulling back the pinch-off point of the inversion region toward the source electrode, thereby increasing the programming efficiency of the memory cell. The method applies the main positive supply voltage Vcc to, the drain electrode of the memory cell from the chip main voltage supply, rather than the conventional method of using a higher voltage than Vcc. To optimize the programming condition, the source voltage and the substrate voltage are adjusted to achieve the maximum threshold voltage shifts under the same applied gate voltage pulse condition (i.e. using the gate pulse with the same voltage amplitude and duration regardless of the source voltage and the substrate voltage). The substrate voltage to the drain voltage can not exceed the avalanche multiplication junction breakdown for a small programming current during the bias voltage adjustment.